-
Notifications
You must be signed in to change notification settings - Fork 0
/
i2s_interface.qsf
79 lines (77 loc) · 4.21 KB
/
i2s_interface.qsf
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
# Date created = 10:02:49 March 15, 2020
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# i2s_interface_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE22F17C6
set_global_assignment -name TOP_LEVEL_ENTITY i2s_interface
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:02:49 MARCH 15, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "15.0.0 SP0.01WE"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name VHDL_FILE src/i2s_interface.vhd
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY "C:\\altera\\15.0\\projects\\i2s_interface" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS TEST_BENCH_MODE -section_id eda_simulation
set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH testbench -section_id eda_simulation
set_global_assignment -name EDA_TEST_BENCH_NAME testbench -section_id eda_simulation
set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id testbench
set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME testbench -section_id testbench
set_global_assignment -name EDA_TEST_BENCH_FILE simulation/modelsim/i2s_interface.vht -section_id testbench
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_global_assignment -name QIP_FILE src/bclk.qip
set_global_assignment -name VECTOR_WAVEFORM_FILE simulation/modelsim/rtl_work/Waveform_bclk.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE simulation/modelsim/rtl_work/Waveform.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE simulation/qsim/Waveform.vwf
set_location_assignment PIN_R8 -to clk
set_location_assignment PIN_D3 -to lrcl
set_global_assignment -name QIP_FILE test.qip
set_location_assignment PIN_A15 -to led0
set_location_assignment PIN_A13 -to led1
set_location_assignment PIN_B13 -to led2
set_location_assignment PIN_A11 -to led3
set_location_assignment PIN_D1 -to led4
set_location_assignment PIN_F3 -to led5
set_location_assignment PIN_B1 -to led6
set_location_assignment PIN_L3 -to led7
set_location_assignment PIN_C3 -to data
set_location_assignment PIN_A3 -to mems_bclk
set_global_assignment -name QIP_FILE src/bitCLK.qip
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top