From b9b3c8f4bff465c0909bfe028633260908b7f72c Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 1 Mar 2024 18:38:48 -0800 Subject: [PATCH 1/9] script-gen changes --- src/coreclr/inc/corinfoinstructionset.h | 152 +++++++++------- src/coreclr/inc/jiteeversionguid.h | 10 +- src/coreclr/inc/readytoruninstructionset.h | 3 + .../Runtime/ReadyToRunInstructionSet.cs | 3 + .../Runtime/ReadyToRunInstructionSetHelper.cs | 6 + .../JitInterface/CorInfoInstructionSet.cs | 164 +++++++++++------- .../ThunkGenerator/InstructionSetDesc.txt | 3 + 7 files changed, 208 insertions(+), 133 deletions(-) diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h index e24bfab038ce0..446898d34f768 100644 --- a/src/coreclr/inc/corinfoinstructionset.h +++ b/src/coreclr/inc/corinfoinstructionset.h @@ -75,38 +75,41 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL=30, InstructionSet_AVX512VBMI=31, InstructionSet_AVX512VBMI_VL=32, - InstructionSet_VectorT128=33, - InstructionSet_VectorT256=34, - InstructionSet_VectorT512=35, - InstructionSet_X86Base_X64=36, - InstructionSet_SSE_X64=37, - InstructionSet_SSE2_X64=38, - InstructionSet_SSE3_X64=39, - InstructionSet_SSSE3_X64=40, - InstructionSet_SSE41_X64=41, - InstructionSet_SSE42_X64=42, - InstructionSet_AVX_X64=43, - InstructionSet_AVX2_X64=44, - InstructionSet_AES_X64=45, - InstructionSet_BMI1_X64=46, - InstructionSet_BMI2_X64=47, - InstructionSet_FMA_X64=48, - InstructionSet_LZCNT_X64=49, - InstructionSet_PCLMULQDQ_X64=50, - InstructionSet_POPCNT_X64=51, - InstructionSet_AVXVNNI_X64=52, - InstructionSet_MOVBE_X64=53, - InstructionSet_X86Serialize_X64=54, - InstructionSet_AVX512F_X64=55, - InstructionSet_AVX512F_VL_X64=56, - InstructionSet_AVX512BW_X64=57, - InstructionSet_AVX512BW_VL_X64=58, - InstructionSet_AVX512CD_X64=59, - InstructionSet_AVX512CD_VL_X64=60, - InstructionSet_AVX512DQ_X64=61, - InstructionSet_AVX512DQ_VL_X64=62, - InstructionSet_AVX512VBMI_X64=63, - InstructionSet_AVX512VBMI_VL_X64=64, + InstructionSet_AVX10v1=33, + InstructionSet_AVX10v1_V256=34, + InstructionSet_AVX10v1_V512=35, + InstructionSet_VectorT128=36, + InstructionSet_VectorT256=37, + InstructionSet_VectorT512=38, + InstructionSet_X86Base_X64=39, + InstructionSet_SSE_X64=40, + InstructionSet_SSE2_X64=41, + InstructionSet_SSE3_X64=42, + InstructionSet_SSSE3_X64=43, + InstructionSet_SSE41_X64=44, + InstructionSet_SSE42_X64=45, + InstructionSet_AVX_X64=46, + InstructionSet_AVX2_X64=47, + InstructionSet_AES_X64=48, + InstructionSet_BMI1_X64=49, + InstructionSet_BMI2_X64=50, + InstructionSet_FMA_X64=51, + InstructionSet_LZCNT_X64=52, + InstructionSet_PCLMULQDQ_X64=53, + InstructionSet_POPCNT_X64=54, + InstructionSet_AVXVNNI_X64=55, + InstructionSet_MOVBE_X64=56, + InstructionSet_X86Serialize_X64=57, + InstructionSet_AVX512F_X64=58, + InstructionSet_AVX512F_VL_X64=59, + InstructionSet_AVX512BW_X64=60, + InstructionSet_AVX512BW_VL_X64=61, + InstructionSet_AVX512CD_X64=62, + InstructionSet_AVX512CD_VL_X64=63, + InstructionSet_AVX512DQ_X64=64, + InstructionSet_AVX512DQ_VL_X64=65, + InstructionSet_AVX512VBMI_X64=66, + InstructionSet_AVX512VBMI_VL_X64=67, #endif // TARGET_AMD64 #ifdef TARGET_X86 InstructionSet_X86Base=1, @@ -141,38 +144,41 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL=30, InstructionSet_AVX512VBMI=31, InstructionSet_AVX512VBMI_VL=32, - InstructionSet_VectorT128=33, - InstructionSet_VectorT256=34, - InstructionSet_VectorT512=35, - InstructionSet_X86Base_X64=36, - InstructionSet_SSE_X64=37, - InstructionSet_SSE2_X64=38, - InstructionSet_SSE3_X64=39, - InstructionSet_SSSE3_X64=40, - InstructionSet_SSE41_X64=41, - InstructionSet_SSE42_X64=42, - InstructionSet_AVX_X64=43, - InstructionSet_AVX2_X64=44, - InstructionSet_AES_X64=45, - InstructionSet_BMI1_X64=46, - InstructionSet_BMI2_X64=47, - InstructionSet_FMA_X64=48, - InstructionSet_LZCNT_X64=49, - InstructionSet_PCLMULQDQ_X64=50, - InstructionSet_POPCNT_X64=51, - InstructionSet_AVXVNNI_X64=52, - InstructionSet_MOVBE_X64=53, - InstructionSet_X86Serialize_X64=54, - InstructionSet_AVX512F_X64=55, - InstructionSet_AVX512F_VL_X64=56, - InstructionSet_AVX512BW_X64=57, - InstructionSet_AVX512BW_VL_X64=58, - InstructionSet_AVX512CD_X64=59, - InstructionSet_AVX512CD_VL_X64=60, - InstructionSet_AVX512DQ_X64=61, - InstructionSet_AVX512DQ_VL_X64=62, - InstructionSet_AVX512VBMI_X64=63, - InstructionSet_AVX512VBMI_VL_X64=64, + InstructionSet_AVX10v1=33, + InstructionSet_AVX10v1_V256=34, + InstructionSet_AVX10v1_V512=35, + InstructionSet_VectorT128=36, + InstructionSet_VectorT256=37, + InstructionSet_VectorT512=38, + InstructionSet_X86Base_X64=39, + InstructionSet_SSE_X64=40, + InstructionSet_SSE2_X64=41, + InstructionSet_SSE3_X64=42, + InstructionSet_SSSE3_X64=43, + InstructionSet_SSE41_X64=44, + InstructionSet_SSE42_X64=45, + InstructionSet_AVX_X64=46, + InstructionSet_AVX2_X64=47, + InstructionSet_AES_X64=48, + InstructionSet_BMI1_X64=49, + InstructionSet_BMI2_X64=50, + InstructionSet_FMA_X64=51, + InstructionSet_LZCNT_X64=52, + InstructionSet_PCLMULQDQ_X64=53, + InstructionSet_POPCNT_X64=54, + InstructionSet_AVXVNNI_X64=55, + InstructionSet_MOVBE_X64=56, + InstructionSet_X86Serialize_X64=57, + InstructionSet_AVX512F_X64=58, + InstructionSet_AVX512F_VL_X64=59, + InstructionSet_AVX512BW_X64=60, + InstructionSet_AVX512BW_VL_X64=61, + InstructionSet_AVX512CD_X64=62, + InstructionSet_AVX512CD_VL_X64=63, + InstructionSet_AVX512DQ_X64=64, + InstructionSet_AVX512DQ_VL_X64=65, + InstructionSet_AVX512VBMI_X64=66, + InstructionSet_AVX512VBMI_VL_X64=67, #endif // TARGET_X86 }; @@ -902,6 +908,12 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet) return "AVX512VBMI_VL"; case InstructionSet_AVX512VBMI_VL_X64 : return "AVX512VBMI_VL_X64"; + case InstructionSet_AVX10v1 : + return "AVX10v1"; + case InstructionSet_AVX10v1_V256 : + return "AVX10v1_V256"; + case InstructionSet_AVX10v1_V512 : + return "AVX10v1_V512"; case InstructionSet_VectorT128 : return "VectorT128"; case InstructionSet_VectorT256 : @@ -974,6 +986,12 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet) return "AVX512VBMI"; case InstructionSet_AVX512VBMI_VL : return "AVX512VBMI_VL"; + case InstructionSet_AVX10v1 : + return "AVX10v1"; + case InstructionSet_AVX10v1_V256 : + return "AVX10v1_V256"; + case InstructionSet_AVX10v1_V512 : + return "AVX10v1_V512"; case InstructionSet_VectorT128 : return "VectorT128"; case InstructionSet_VectorT256 : @@ -1044,6 +1062,9 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL; case READYTORUN_INSTRUCTION_Avx512Vbmi: return InstructionSet_AVX512VBMI; case READYTORUN_INSTRUCTION_Avx512Vbmi_VL: return InstructionSet_AVX512VBMI_VL; + case READYTORUN_INSTRUCTION_Avx10v1: return InstructionSet_AVX10v1; + case READYTORUN_INSTRUCTION_Avx10v1_V256: return InstructionSet_AVX10v1_V256; + case READYTORUN_INSTRUCTION_Avx10v1_V512: return InstructionSet_AVX10v1_V512; case READYTORUN_INSTRUCTION_VectorT128: return InstructionSet_VectorT128; case READYTORUN_INSTRUCTION_VectorT256: return InstructionSet_VectorT256; case READYTORUN_INSTRUCTION_VectorT512: return InstructionSet_VectorT512; @@ -1078,6 +1099,9 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst case READYTORUN_INSTRUCTION_Avx512DQ_VL: return InstructionSet_AVX512DQ_VL; case READYTORUN_INSTRUCTION_Avx512Vbmi: return InstructionSet_AVX512VBMI; case READYTORUN_INSTRUCTION_Avx512Vbmi_VL: return InstructionSet_AVX512VBMI_VL; + case READYTORUN_INSTRUCTION_Avx10v1: return InstructionSet_AVX10v1; + case READYTORUN_INSTRUCTION_Avx10v1_V256: return InstructionSet_AVX10v1_V256; + case READYTORUN_INSTRUCTION_Avx10v1_V512: return InstructionSet_AVX10v1_V512; case READYTORUN_INSTRUCTION_VectorT128: return InstructionSet_VectorT128; case READYTORUN_INSTRUCTION_VectorT256: return InstructionSet_VectorT256; case READYTORUN_INSTRUCTION_VectorT512: return InstructionSet_VectorT512; diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h index 11675936acfa3..cd984fb5f99d1 100644 --- a/src/coreclr/inc/jiteeversionguid.h +++ b/src/coreclr/inc/jiteeversionguid.h @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID; #define GUID_DEFINED #endif // !GUID_DEFINED -constexpr GUID JITEEVersionIdentifier = { /* 86eab154-5d93-4fad-bc07-e94fd9268b70 */ - 0x86eab154, - 0x5d93, - 0x4fad, - {0xbc, 0x07, 0xe9, 0x4f, 0xd9, 0x26, 0x8b, 0x70} +constexpr GUID JITEEVersionIdentifier = { /* 0c094642-1416-492c-a49d-9ababfa6f7d1 */ + 0x0c094642, + 0x1416, + 0x492c, + {0xa4, 0x9d, 0x9a, 0xba, 0xbf, 0xa6, 0xf7, 0xd1} }; ////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/coreclr/inc/readytoruninstructionset.h b/src/coreclr/inc/readytoruninstructionset.h index 4ec3b030ae5bb..fe388c04a60fc 100644 --- a/src/coreclr/inc/readytoruninstructionset.h +++ b/src/coreclr/inc/readytoruninstructionset.h @@ -52,6 +52,9 @@ enum ReadyToRunInstructionSet READYTORUN_INSTRUCTION_VectorT512=41, READYTORUN_INSTRUCTION_Rcpc2=42, READYTORUN_INSTRUCTION_Sve=43, + READYTORUN_INSTRUCTION_Avx10v1=44, + READYTORUN_INSTRUCTION_Avx10v1_V256=45, + READYTORUN_INSTRUCTION_Avx10v1_V512=46, }; diff --git a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs index 284131d1641ac..0e2fec09e19d5 100644 --- a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs +++ b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSet.cs @@ -55,6 +55,9 @@ public enum ReadyToRunInstructionSet VectorT512=41, Rcpc2=42, Sve=43, + Avx10v1=44, + Avx10v1_V256=45, + Avx10v1_V512=46, } } diff --git a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs index 7000b482ec604..f42cc32453e82 100644 --- a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs +++ b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs @@ -118,6 +118,9 @@ public static class ReadyToRunInstructionSetHelper case InstructionSet.X64_AVX512VBMI_X64: return ReadyToRunInstructionSet.Avx512Vbmi; case InstructionSet.X64_AVX512VBMI_VL: return ReadyToRunInstructionSet.Avx512Vbmi_VL; case InstructionSet.X64_AVX512VBMI_VL_X64: return ReadyToRunInstructionSet.Avx512Vbmi_VL; + case InstructionSet.X64_AVX10v1: return ReadyToRunInstructionSet.Avx10v1; + case InstructionSet.X64_AVX10v1_V256: return ReadyToRunInstructionSet.Avx10v1_V256; + case InstructionSet.X64_AVX10v1_V512: return ReadyToRunInstructionSet.Avx10v1_V512; case InstructionSet.X64_VectorT128: return ReadyToRunInstructionSet.VectorT128; case InstructionSet.X64_VectorT256: return ReadyToRunInstructionSet.VectorT256; case InstructionSet.X64_VectorT512: return ReadyToRunInstructionSet.VectorT512; @@ -191,6 +194,9 @@ public static class ReadyToRunInstructionSetHelper case InstructionSet.X86_AVX512VBMI_X64: return null; case InstructionSet.X86_AVX512VBMI_VL: return ReadyToRunInstructionSet.Avx512Vbmi_VL; case InstructionSet.X86_AVX512VBMI_VL_X64: return null; + case InstructionSet.X86_AVX10v1: return ReadyToRunInstructionSet.Avx10v1; + case InstructionSet.X86_AVX10v1_V256: return ReadyToRunInstructionSet.Avx10v1_V256; + case InstructionSet.X86_AVX10v1_V512: return ReadyToRunInstructionSet.Avx10v1_V512; case InstructionSet.X86_VectorT128: return ReadyToRunInstructionSet.VectorT128; case InstructionSet.X86_VectorT256: return ReadyToRunInstructionSet.VectorT256; case InstructionSet.X86_VectorT512: return ReadyToRunInstructionSet.VectorT512; diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs index a5398c85ca075..b10be291a7038 100644 --- a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs +++ b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs @@ -73,6 +73,9 @@ public enum InstructionSet X64_AVX512DQ_VL = InstructionSet_X64.AVX512DQ_VL, X64_AVX512VBMI = InstructionSet_X64.AVX512VBMI, X64_AVX512VBMI_VL = InstructionSet_X64.AVX512VBMI_VL, + X64_AVX10v1 = InstructionSet_X64.AVX10v1, + X64_AVX10v1_V256 = InstructionSet_X64.AVX10v1_V256, + X64_AVX10v1_V512 = InstructionSet_X64.AVX10v1_V512, X64_VectorT128 = InstructionSet_X64.VectorT128, X64_VectorT256 = InstructionSet_X64.VectorT256, X64_VectorT512 = InstructionSet_X64.VectorT512, @@ -137,6 +140,9 @@ public enum InstructionSet X86_AVX512DQ_VL = InstructionSet_X86.AVX512DQ_VL, X86_AVX512VBMI = InstructionSet_X86.AVX512VBMI, X86_AVX512VBMI_VL = InstructionSet_X86.AVX512VBMI_VL, + X86_AVX10v1 = InstructionSet_X86.AVX10v1, + X86_AVX10v1_V256 = InstructionSet_X86.AVX10v1_V256, + X86_AVX10v1_V512 = InstructionSet_X86.AVX10v1_V512, X86_VectorT128 = InstructionSet_X86.VectorT128, X86_VectorT256 = InstructionSet_X86.VectorT256, X86_VectorT512 = InstructionSet_X86.VectorT512, @@ -237,38 +243,41 @@ public enum InstructionSet_X64 AVX512DQ_VL = 30, AVX512VBMI = 31, AVX512VBMI_VL = 32, - VectorT128 = 33, - VectorT256 = 34, - VectorT512 = 35, - X86Base_X64 = 36, - SSE_X64 = 37, - SSE2_X64 = 38, - SSE3_X64 = 39, - SSSE3_X64 = 40, - SSE41_X64 = 41, - SSE42_X64 = 42, - AVX_X64 = 43, - AVX2_X64 = 44, - AES_X64 = 45, - BMI1_X64 = 46, - BMI2_X64 = 47, - FMA_X64 = 48, - LZCNT_X64 = 49, - PCLMULQDQ_X64 = 50, - POPCNT_X64 = 51, - AVXVNNI_X64 = 52, - MOVBE_X64 = 53, - X86Serialize_X64 = 54, - AVX512F_X64 = 55, - AVX512F_VL_X64 = 56, - AVX512BW_X64 = 57, - AVX512BW_VL_X64 = 58, - AVX512CD_X64 = 59, - AVX512CD_VL_X64 = 60, - AVX512DQ_X64 = 61, - AVX512DQ_VL_X64 = 62, - AVX512VBMI_X64 = 63, - AVX512VBMI_VL_X64 = 64, + AVX10v1 = 33, + AVX10v1_V256 = 34, + AVX10v1_V512 = 35, + VectorT128 = 36, + VectorT256 = 37, + VectorT512 = 38, + X86Base_X64 = 39, + SSE_X64 = 40, + SSE2_X64 = 41, + SSE3_X64 = 42, + SSSE3_X64 = 43, + SSE41_X64 = 44, + SSE42_X64 = 45, + AVX_X64 = 46, + AVX2_X64 = 47, + AES_X64 = 48, + BMI1_X64 = 49, + BMI2_X64 = 50, + FMA_X64 = 51, + LZCNT_X64 = 52, + PCLMULQDQ_X64 = 53, + POPCNT_X64 = 54, + AVXVNNI_X64 = 55, + MOVBE_X64 = 56, + X86Serialize_X64 = 57, + AVX512F_X64 = 58, + AVX512F_VL_X64 = 59, + AVX512BW_X64 = 60, + AVX512BW_VL_X64 = 61, + AVX512CD_X64 = 62, + AVX512CD_VL_X64 = 63, + AVX512DQ_X64 = 64, + AVX512DQ_VL_X64 = 65, + AVX512VBMI_X64 = 66, + AVX512VBMI_VL_X64 = 67, } public enum InstructionSet_X86 @@ -307,38 +316,41 @@ public enum InstructionSet_X86 AVX512DQ_VL = 30, AVX512VBMI = 31, AVX512VBMI_VL = 32, - VectorT128 = 33, - VectorT256 = 34, - VectorT512 = 35, - X86Base_X64 = 36, - SSE_X64 = 37, - SSE2_X64 = 38, - SSE3_X64 = 39, - SSSE3_X64 = 40, - SSE41_X64 = 41, - SSE42_X64 = 42, - AVX_X64 = 43, - AVX2_X64 = 44, - AES_X64 = 45, - BMI1_X64 = 46, - BMI2_X64 = 47, - FMA_X64 = 48, - LZCNT_X64 = 49, - PCLMULQDQ_X64 = 50, - POPCNT_X64 = 51, - AVXVNNI_X64 = 52, - MOVBE_X64 = 53, - X86Serialize_X64 = 54, - AVX512F_X64 = 55, - AVX512F_VL_X64 = 56, - AVX512BW_X64 = 57, - AVX512BW_VL_X64 = 58, - AVX512CD_X64 = 59, - AVX512CD_VL_X64 = 60, - AVX512DQ_X64 = 61, - AVX512DQ_VL_X64 = 62, - AVX512VBMI_X64 = 63, - AVX512VBMI_VL_X64 = 64, + AVX10v1 = 33, + AVX10v1_V256 = 34, + AVX10v1_V512 = 35, + VectorT128 = 36, + VectorT256 = 37, + VectorT512 = 38, + X86Base_X64 = 39, + SSE_X64 = 40, + SSE2_X64 = 41, + SSE3_X64 = 42, + SSSE3_X64 = 43, + SSE41_X64 = 44, + SSE42_X64 = 45, + AVX_X64 = 46, + AVX2_X64 = 47, + AES_X64 = 48, + BMI1_X64 = 49, + BMI2_X64 = 50, + FMA_X64 = 51, + LZCNT_X64 = 52, + PCLMULQDQ_X64 = 53, + POPCNT_X64 = 54, + AVXVNNI_X64 = 55, + MOVBE_X64 = 56, + X86Serialize_X64 = 57, + AVX512F_X64 = 58, + AVX512F_VL_X64 = 59, + AVX512BW_X64 = 60, + AVX512BW_VL_X64 = 61, + AVX512CD_X64 = 62, + AVX512CD_VL_X64 = 63, + AVX512DQ_X64 = 64, + AVX512DQ_VL_X64 = 65, + AVX512VBMI_X64 = 66, + AVX512VBMI_VL_X64 = 67, } public unsafe struct InstructionSetFlags : IEnumerable @@ -1248,6 +1260,9 @@ public static IEnumerable ArchitectureToValidInstructionSets yield return new InstructionSetInfo("avx512dq_vl", "Avx512DQ_VL", InstructionSet.X64_AVX512DQ_VL, true); yield return new InstructionSetInfo("avx512vbmi", "Avx512Vbmi", InstructionSet.X64_AVX512VBMI, true); yield return new InstructionSetInfo("avx512vbmi_vl", "Avx512Vbmi_VL", InstructionSet.X64_AVX512VBMI_VL, true); + yield return new InstructionSetInfo("avx10v1", "Avx10v1", InstructionSet.X64_AVX10v1, true); + yield return new InstructionSetInfo("avx10v1_v256", "Avx10v1_V256", InstructionSet.X64_AVX10v1_V256, true); + yield return new InstructionSetInfo("avx10v1_v512", "Avx10v1_V512", InstructionSet.X64_AVX10v1_V512, true); yield return new InstructionSetInfo("vectort128", "VectorT128", InstructionSet.X64_VectorT128, true); yield return new InstructionSetInfo("vectort256", "VectorT256", InstructionSet.X64_VectorT256, true); yield return new InstructionSetInfo("vectort512", "VectorT512", InstructionSet.X64_VectorT512, true); @@ -1286,6 +1301,9 @@ public static IEnumerable ArchitectureToValidInstructionSets yield return new InstructionSetInfo("avx512dq_vl", "Avx512DQ_VL", InstructionSet.X86_AVX512DQ_VL, true); yield return new InstructionSetInfo("avx512vbmi", "Avx512Vbmi", InstructionSet.X86_AVX512VBMI, true); yield return new InstructionSetInfo("avx512vbmi_vl", "Avx512Vbmi_VL", InstructionSet.X86_AVX512VBMI_VL, true); + yield return new InstructionSetInfo("avx10v1", "Avx10v1", InstructionSet.X86_AVX10v1, true); + yield return new InstructionSetInfo("avx10v1_v256", "Avx10v1_V256", InstructionSet.X86_AVX10v1_V256, true); + yield return new InstructionSetInfo("avx10v1_v512", "Avx10v1_V512", InstructionSet.X86_AVX10v1_V512, true); yield return new InstructionSetInfo("vectort128", "VectorT128", InstructionSet.X86_VectorT128, true); yield return new InstructionSetInfo("vectort256", "VectorT256", InstructionSet.X86_VectorT256, true); yield return new InstructionSetInfo("vectort512", "VectorT512", InstructionSet.X86_VectorT512, true); @@ -1741,6 +1759,15 @@ public static InstructionSet LookupPlatformIntrinsicInstructionSet(TargetArchite else { return InstructionSet.X64_AVX512VBMI; } + case "Avx10v1": + { return InstructionSet.X64_AVX10v1; } + + case "Avx10v1_V256": + { return InstructionSet.X64_AVX10v1_V256; } + + case "Avx10v1_V512": + { return InstructionSet.X64_AVX10v1_V512; } + case "VectorT128": { return InstructionSet.X64_VectorT128; } @@ -1844,6 +1871,15 @@ public static InstructionSet LookupPlatformIntrinsicInstructionSet(TargetArchite else { return InstructionSet.X86_AVX512VBMI; } + case "Avx10v1": + { return InstructionSet.X86_AVX10v1; } + + case "Avx10v1_V256": + { return InstructionSet.X86_AVX10v1_V256; } + + case "Avx10v1_V512": + { return InstructionSet.X86_AVX10v1_V512; } + case "VectorT128": { return InstructionSet.X86_VectorT128; } diff --git a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt index 7b6e15b87bd84..4f392d21083f8 100644 --- a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt +++ b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt @@ -57,6 +57,9 @@ instructionset ,X86 ,Avx512DQ , ,35 ,AVX512DQ instructionset ,X86 ,Avx512DQ_VL , ,36 ,AVX512DQ_VL ,avx512dq_vl instructionset ,X86 ,Avx512Vbmi , ,37 ,AVX512VBMI ,avx512vbmi instructionset ,X86 ,Avx512Vbmi_VL , ,38 ,AVX512VBMI_VL ,avx512vbmi_vl +instructionset ,X86 ,Avx10v1 , ,44 ,AVX10v1 ,avx10v1 +instructionset ,X86 ,Avx10v1_V256 , ,45 ,AVX10v1_V256 ,avx10v1_v256 +instructionset ,X86 ,Avx10v1_V512 , ,46 ,AVX10v1_V512 ,avx10v1_v512 instructionset ,X86 ,VectorT128 , ,39 ,VectorT128 ,vectort128 instructionset ,X86 ,VectorT256 , ,40 ,VectorT256 ,vectort256 instructionset ,X86 ,VectorT512 , ,41 ,VectorT512 ,vectort512 From 619fd398aedf0e49e085335ec74f9570a68d30b8 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 1 Mar 2024 19:06:57 -0800 Subject: [PATCH 2/9] hand-written changes --- src/coreclr/inc/clrconfigvalues.h | 4 ++++ src/coreclr/jit/compiler.cpp | 15 +++++++++++++ src/coreclr/jit/jitconfigvalues.h | 4 ++++ src/coreclr/vm/codeman.cpp | 20 +++++++++++++++++ src/native/minipal/cpufeatures.c | 36 +++++++++++++++++++++++++++++++ src/native/minipal/cpufeatures.h | 3 +++ 6 files changed, 82 insertions(+) diff --git a/src/coreclr/inc/clrconfigvalues.h b/src/coreclr/inc/clrconfigvalues.h index d9571f0776456..5d00f07b770a5 100644 --- a/src/coreclr/inc/clrconfigvalues.h +++ b/src/coreclr/inc/clrconfigvalues.h @@ -760,6 +760,10 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F, W("EnableAVX512F RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F_VL, W("EnableAVX512F_VL"), 1, "Allows AVX512F_VL+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI, W("EnableAVX512VBMI"), 1, "Allows AVX512VBMI+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI_VL, W("EnableAVX512VBMI_VL"), 1, "Allows AVX512VBMI_VL+ hardware intrinsics to be disabled") +RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1, W("EnableAVX10v1"), 1, "Allows AVX10v1+ hardware intrinsics to be disabled") +RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1_V256, W("EnableAVX10v1_V256"), 1, "Allows AVX10v1_V256+ hardware intrinsics to be disabled") +RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1_V512, W("EnableAVX10v1_V512"), 1, "Allows AVX10v1_V512+ hardware intrinsics to be disabled") +RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_Avx10MaxVectorLength, W("Avx10MaxVectorLength"), 0, "The max vector length supported", CLRConfig::LookupOptions::ParseIntegerAsBase10) RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled") diff --git a/src/coreclr/jit/compiler.cpp b/src/coreclr/jit/compiler.cpp index 2bba7db9ae7ae..c609f5fe4ccc9 100644 --- a/src/coreclr/jit/compiler.cpp +++ b/src/coreclr/jit/compiler.cpp @@ -6241,6 +6241,21 @@ int Compiler::compCompile(CORINFO_MODULE_HANDLE classPtr, { instructionSetFlags.AddInstructionSet(InstructionSet_AVX512VBMI_VL); } + + if (JitConfig.EnableAVX10v1() != 0) + { + instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1); + } + + if (JitConfig.EnableAVX10v1_V256() != 0) + { + instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1_V256); + } + + if (JitConfig.EnableAVX10v1_V512() != 0) + { + instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1_V512); + } #endif // These calls are important and explicitly ordered to ensure that the flags are correct in diff --git a/src/coreclr/jit/jitconfigvalues.h b/src/coreclr/jit/jitconfigvalues.h index ee8320344ce42..28041bf41e96c 100644 --- a/src/coreclr/jit/jitconfigvalues.h +++ b/src/coreclr/jit/jitconfigvalues.h @@ -326,6 +326,10 @@ CONFIG_INTEGER(EnableAVX512F, W("EnableAVX512F"), 1) / CONFIG_INTEGER(EnableAVX512F_VL, W("EnableAVX512F_VL"), 1) // Allows AVX512F+ AVX512VL+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableAVX512VBMI, W("EnableAVX512VBMI"), 1) // Allows AVX512VBMI+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableAVX512VBMI_VL, W("EnableAVX512VBMI_VL"), 1) // Allows AVX512VBMI_VL+ hardware intrinsics to be disabled +CONFIG_INTEGER(EnableAVX10v1, W("EnableAVX10v1"), 1) // Allows AVX10v1+ hardware intrinsics to be disabled +CONFIG_INTEGER(EnableAVX10v1_V256, W("EnableAVX10v1_V256"), 1) // Allows AVX10v1_V256+ hardware intrinsics to be disabled +CONFIG_INTEGER(EnableAVX10v1_V512, W("EnableAVX10v1_V512"), 1) // Allows AVX10v1_V512+ hardware intrinsics to be disabled +CONFIG_INTEGER(Avx10MaxVectorLength, W("Avx10MaxVectorLength"), 0) // The max vector length supported CONFIG_INTEGER(EnableAVXVNNI, W("EnableAVXVNNI"), 1) // Allows AVXVNNI+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableBMI1, W("EnableBMI1"), 1) // Allows BMI1+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableBMI2, W("EnableBMI2"), 1) // Allows BMI2+ hardware intrinsics to be disabled diff --git a/src/coreclr/vm/codeman.cpp b/src/coreclr/vm/codeman.cpp index 52917161fb002..af23b9b8b5612 100644 --- a/src/coreclr/vm/codeman.cpp +++ b/src/coreclr/vm/codeman.cpp @@ -1285,6 +1285,8 @@ void EEJitManager::SetCpuInfo() // Get the maximum bitwidth of Vector, rounding down to the nearest multiple of 128-bits uint32_t maxVectorTBitWidth = (CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_MaxVectorTBitWidth) / 128) * 128; + uint32_t avx10MaxVectorLength = CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_Avx10MaxVectorLength); + if (((cpuFeatures & XArchIntrinsicConstants_VectorT256) != 0) && ((maxVectorTBitWidth == 0) || (maxVectorTBitWidth >= 256))) { // We allow 256-bit Vector by default @@ -1448,6 +1450,24 @@ void EEJitManager::SetCpuInfo() { CPUCompileFlags.Set(InstructionSet_X86Serialize); } + + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1) + && (avx10MaxVectorLength >= 128)) + { + CPUCompileFlags.Set(InstructionSet_AVX10v1); + } + + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V256) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1_V256) + && (avx10MaxVectorLength >= 256)) + { + CPUCompileFlags.Set(InstructionSet_AVX10v1_V256); + } + + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1_V512) + && (avx10MaxVectorLength >= 512)) + { + CPUCompileFlags.Set(InstructionSet_AVX10v1_V512); + } #elif defined(TARGET_ARM64) #if !defined(TARGET_WINDOWS) diff --git a/src/native/minipal/cpufeatures.c b/src/native/minipal/cpufeatures.c index aeb7686dbec76..50df58721d6e9 100644 --- a/src/native/minipal/cpufeatures.c +++ b/src/native/minipal/cpufeatures.c @@ -306,6 +306,42 @@ int minipal_getcpufeatures(void) result |= XArchIntrinsicConstants_Serialize; // SERIALIZE } } + + if (maxCpuId >= 0x07) + { + // Detect Avx10 here. + // Given paradigm: + // 1. CPUID.(EAX=07H, ECX=01H):EDX[bit 19] = 1 -> ISA supported. + // 2. CPUID.(EAX=24H, ECX=00H):EBX[bits 7:0] >= 1 -> ISA version larger than 1. + // with 1,2, set XArchIntrinsicConstants_Avx10_1 + + // 3. CPUID.(EAX=24H, ECX=00H):EBX[bits 18:16] -> vector length support. + __cpuidex(cpuidInfo, 0x00000007, 0x00000001); + if ((cpuidInfo[CPUID_EDX] & (1 << 19)) != 0) // Avx10 supported + { + __cpuidex(cpuidInfo, 0x00000024, 0x00000000); + const int versionMask = 0xFF; // [7:0] + if((cpuidInfo[CPUID_EBX] & versionMask) >= 1) // version higher than 1 + { + result |= XArchIntrinsicConstants_VectorT128; // Avx10 guarantee V128 + result |= XArchIntrinsicConstants_Avx10v1; + } + + const int vector256Mask = (1 << 17); + const int vector512Mask = (1 << 18); + if((cpuidInfo[CPUID_EBX] & vector256Mask) != 0) + { + result |= XArchIntrinsicConstants_VectorT256; + result |= XArchIntrinsicConstants_Avx10v1_V256; + } + + if((cpuidInfo[CPUID_EBX] & vector512Mask) != 0) + { + result |= XArchIntrinsicConstants_VectorT512; + result |= XArchIntrinsicConstants_Avx10v1_V512; + } + } + } } __cpuid(cpuidInfo, 0x80000000); diff --git a/src/native/minipal/cpufeatures.h b/src/native/minipal/cpufeatures.h index 3b8d0de8aa865..a5a803e5d2888 100644 --- a/src/native/minipal/cpufeatures.h +++ b/src/native/minipal/cpufeatures.h @@ -40,6 +40,9 @@ enum XArchIntrinsicConstants XArchIntrinsicConstants_VectorT128 = 0x4000000, XArchIntrinsicConstants_VectorT256 = 0x8000000, XArchIntrinsicConstants_VectorT512 = 0x10000000, + XArchIntrinsicConstants_Avx10v1 = 0x20000000, + XArchIntrinsicConstants_Avx10v1_V256 = 0x40000000, + XArchIntrinsicConstants_Avx10v1_V512 = 0x80000000, }; #endif // HOST_X86 || HOST_AMD64 From f269098522979534db9f099ee8b5fc62d79c8287 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 15 Mar 2024 18:58:18 -0700 Subject: [PATCH 3/9] Resolve comments: Removed seperate env vars to control Avx10v1_V256/512, now Avx10v1 instructions with different vector length will all be controlled by EnableAvx10v1 alone. --- src/coreclr/inc/clrconfigvalues.h | 3 --- src/coreclr/jit/compiler.cpp | 15 --------------- src/coreclr/jit/jitconfigvalues.h | 3 --- src/coreclr/vm/codeman.cpp | 11 +++-------- 4 files changed, 3 insertions(+), 29 deletions(-) diff --git a/src/coreclr/inc/clrconfigvalues.h b/src/coreclr/inc/clrconfigvalues.h index 5d00f07b770a5..5c833cb169137 100644 --- a/src/coreclr/inc/clrconfigvalues.h +++ b/src/coreclr/inc/clrconfigvalues.h @@ -761,9 +761,6 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512F_VL, W("EnableAVX512F RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI, W("EnableAVX512VBMI"), 1, "Allows AVX512VBMI+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI_VL, W("EnableAVX512VBMI_VL"), 1, "Allows AVX512VBMI_VL+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1, W("EnableAVX10v1"), 1, "Allows AVX10v1+ hardware intrinsics to be disabled") -RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1_V256, W("EnableAVX10v1_V256"), 1, "Allows AVX10v1_V256+ hardware intrinsics to be disabled") -RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1_V512, W("EnableAVX10v1_V512"), 1, "Allows AVX10v1_V512+ hardware intrinsics to be disabled") -RETAIL_CONFIG_DWORD_INFO_EX(EXTERNAL_Avx10MaxVectorLength, W("Avx10MaxVectorLength"), 0, "The max vector length supported", CLRConfig::LookupOptions::ParseIntegerAsBase10) RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled") RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled") diff --git a/src/coreclr/jit/compiler.cpp b/src/coreclr/jit/compiler.cpp index c609f5fe4ccc9..2bba7db9ae7ae 100644 --- a/src/coreclr/jit/compiler.cpp +++ b/src/coreclr/jit/compiler.cpp @@ -6241,21 +6241,6 @@ int Compiler::compCompile(CORINFO_MODULE_HANDLE classPtr, { instructionSetFlags.AddInstructionSet(InstructionSet_AVX512VBMI_VL); } - - if (JitConfig.EnableAVX10v1() != 0) - { - instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1); - } - - if (JitConfig.EnableAVX10v1_V256() != 0) - { - instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1_V256); - } - - if (JitConfig.EnableAVX10v1_V512() != 0) - { - instructionSetFlags.AddInstructionSet(InstructionSet_AVX10v1_V512); - } #endif // These calls are important and explicitly ordered to ensure that the flags are correct in diff --git a/src/coreclr/jit/jitconfigvalues.h b/src/coreclr/jit/jitconfigvalues.h index 28041bf41e96c..265c326aeea82 100644 --- a/src/coreclr/jit/jitconfigvalues.h +++ b/src/coreclr/jit/jitconfigvalues.h @@ -327,9 +327,6 @@ CONFIG_INTEGER(EnableAVX512F_VL, W("EnableAVX512F_VL"), 1) / CONFIG_INTEGER(EnableAVX512VBMI, W("EnableAVX512VBMI"), 1) // Allows AVX512VBMI+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableAVX512VBMI_VL, W("EnableAVX512VBMI_VL"), 1) // Allows AVX512VBMI_VL+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableAVX10v1, W("EnableAVX10v1"), 1) // Allows AVX10v1+ hardware intrinsics to be disabled -CONFIG_INTEGER(EnableAVX10v1_V256, W("EnableAVX10v1_V256"), 1) // Allows AVX10v1_V256+ hardware intrinsics to be disabled -CONFIG_INTEGER(EnableAVX10v1_V512, W("EnableAVX10v1_V512"), 1) // Allows AVX10v1_V512+ hardware intrinsics to be disabled -CONFIG_INTEGER(Avx10MaxVectorLength, W("Avx10MaxVectorLength"), 0) // The max vector length supported CONFIG_INTEGER(EnableAVXVNNI, W("EnableAVXVNNI"), 1) // Allows AVXVNNI+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableBMI1, W("EnableBMI1"), 1) // Allows BMI1+ hardware intrinsics to be disabled CONFIG_INTEGER(EnableBMI2, W("EnableBMI2"), 1) // Allows BMI2+ hardware intrinsics to be disabled diff --git a/src/coreclr/vm/codeman.cpp b/src/coreclr/vm/codeman.cpp index af23b9b8b5612..3e7deb9ec0329 100644 --- a/src/coreclr/vm/codeman.cpp +++ b/src/coreclr/vm/codeman.cpp @@ -1285,8 +1285,6 @@ void EEJitManager::SetCpuInfo() // Get the maximum bitwidth of Vector, rounding down to the nearest multiple of 128-bits uint32_t maxVectorTBitWidth = (CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_MaxVectorTBitWidth) / 128) * 128; - uint32_t avx10MaxVectorLength = CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_Avx10MaxVectorLength); - if (((cpuFeatures & XArchIntrinsicConstants_VectorT256) != 0) && ((maxVectorTBitWidth == 0) || (maxVectorTBitWidth >= 256))) { // We allow 256-bit Vector by default @@ -1451,20 +1449,17 @@ void EEJitManager::SetCpuInfo() CPUCompileFlags.Set(InstructionSet_X86Serialize); } - if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1) - && (avx10MaxVectorLength >= 128)) + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) { CPUCompileFlags.Set(InstructionSet_AVX10v1); } - if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V256) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1_V256) - && (avx10MaxVectorLength >= 256)) + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V256) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) { CPUCompileFlags.Set(InstructionSet_AVX10v1_V256); } - if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1_V512) - && (avx10MaxVectorLength >= 512)) + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) { CPUCompileFlags.Set(InstructionSet_AVX10v1_V512); } From de0a52af94d3e9dc99b3de181646349673840966 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 15 Mar 2024 15:03:07 -0700 Subject: [PATCH 4/9] Add missing definition and implication in ISA descriptor. --- src/coreclr/inc/corinfoinstructionset.h | 62 +++++++++ src/coreclr/inc/jiteeversionguid.h | 10 +- .../JitInterface/CorInfoInstructionSet.cs | 124 ++++++++++++++++++ .../ThunkGenerator/InstructionSetDesc.txt | 17 +++ 4 files changed, 208 insertions(+), 5 deletions(-) diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h index 446898d34f768..3cfebbdf51b78 100644 --- a/src/coreclr/inc/corinfoinstructionset.h +++ b/src/coreclr/inc/corinfoinstructionset.h @@ -110,6 +110,9 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL_X64=65, InstructionSet_AVX512VBMI_X64=66, InstructionSet_AVX512VBMI_VL_X64=67, + InstructionSet_Avx10v1_X64=68, + InstructionSet_Avx10v1_V256_X64=69, + InstructionSet_Avx10v1_V512_X64=70, #endif // TARGET_AMD64 #ifdef TARGET_X86 InstructionSet_X86Base=1, @@ -179,6 +182,9 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL_X64=65, InstructionSet_AVX512VBMI_X64=66, InstructionSet_AVX512VBMI_VL_X64=67, + InstructionSet_Avx10v1_X64=68, + InstructionSet_Avx10v1_V256_X64=69, + InstructionSet_Avx10v1_V512_X64=70, #endif // TARGET_X86 }; @@ -620,6 +626,34 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1_V256)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_FMA)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_VectorT128) && !resultflags.HasInstructionSet(InstructionSet_SSE2)) resultflags.RemoveInstructionSet(InstructionSet_VectorT128); if (resultflags.HasInstructionSet(InstructionSet_VectorT256) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) @@ -706,6 +740,34 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1_V256)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_FMA)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512CD_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512DQ_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_VectorT128) && !resultflags.HasInstructionSet(InstructionSet_SSE2)) resultflags.RemoveInstructionSet(InstructionSet_VectorT128); if (resultflags.HasInstructionSet(InstructionSet_VectorT256) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h index cd984fb5f99d1..075f102ff884f 100644 --- a/src/coreclr/inc/jiteeversionguid.h +++ b/src/coreclr/inc/jiteeversionguid.h @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID; #define GUID_DEFINED #endif // !GUID_DEFINED -constexpr GUID JITEEVersionIdentifier = { /* 0c094642-1416-492c-a49d-9ababfa6f7d1 */ - 0x0c094642, - 0x1416, - 0x492c, - {0xa4, 0x9d, 0x9a, 0xba, 0xbf, 0xa6, 0xf7, 0xd1} +constexpr GUID JITEEVersionIdentifier = { /* 055345b0-c850-4c0a-9ae0-aa75a684ff01 */ + 0x055345b0, + 0xc850, + 0x4c0a, + {0x9a, 0xe0, 0xaa, 0x75, 0xa6, 0x84, 0xff, 0x01} }; ////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs index b10be291a7038..f79bd66bb5343 100644 --- a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs +++ b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs @@ -108,6 +108,9 @@ public enum InstructionSet X64_AVX512DQ_VL_X64 = InstructionSet_X64.AVX512DQ_VL_X64, X64_AVX512VBMI_X64 = InstructionSet_X64.AVX512VBMI_X64, X64_AVX512VBMI_VL_X64 = InstructionSet_X64.AVX512VBMI_VL_X64, + X64_Avx10v1_X64 = InstructionSet_X64.Avx10v1_X64, + X64_Avx10v1_V256_X64 = InstructionSet_X64.Avx10v1_V256_X64, + X64_Avx10v1_V512_X64 = InstructionSet_X64.Avx10v1_V512_X64, X86_X86Base = InstructionSet_X86.X86Base, X86_SSE = InstructionSet_X86.SSE, X86_SSE2 = InstructionSet_X86.SSE2, @@ -175,6 +178,9 @@ public enum InstructionSet X86_AVX512DQ_VL_X64 = InstructionSet_X86.AVX512DQ_VL_X64, X86_AVX512VBMI_X64 = InstructionSet_X86.AVX512VBMI_X64, X86_AVX512VBMI_VL_X64 = InstructionSet_X86.AVX512VBMI_VL_X64, + X86_Avx10v1_X64 = InstructionSet_X86.Avx10v1_X64, + X86_Avx10v1_V256_X64 = InstructionSet_X86.Avx10v1_V256_X64, + X86_Avx10v1_V512_X64 = InstructionSet_X86.Avx10v1_V512_X64, } public enum InstructionSet_ARM64 { @@ -278,6 +284,9 @@ public enum InstructionSet_X64 AVX512DQ_VL_X64 = 65, AVX512VBMI_X64 = 66, AVX512VBMI_VL_X64 = 67, + Avx10v1_X64 = 68, + Avx10v1_V256_X64 = 69, + Avx10v1_V512_X64 = 70, } public enum InstructionSet_X86 @@ -351,6 +360,9 @@ public enum InstructionSet_X86 AVX512DQ_VL_X64 = 65, AVX512VBMI_X64 = 66, AVX512VBMI_VL_X64 = 67, + Avx10v1_X64 = 68, + Avx10v1_V256_X64 = 69, + Avx10v1_V512_X64 = 70, } public unsafe struct InstructionSetFlags : IEnumerable @@ -758,6 +770,34 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_Avx10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X64_Avx10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX2); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_FMA); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512F); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512F_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512CD); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512CD_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512DQ); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512DQ_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_VectorT128)) resultflags.AddInstructionSet(InstructionSet.X64_SSE2); if (resultflags.HasInstructionSet(InstructionSet.X64_VectorT256)) @@ -845,6 +885,34 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_Avx10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X86_Avx10v1); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX2); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X86_FMA); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512F); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512F_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512CD); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512CD_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512DQ); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512DQ_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_VectorT128)) resultflags.AddInstructionSet(InstructionSet.X86_SSE2); if (resultflags.HasInstructionSet(InstructionSet.X86_VectorT256)) @@ -1053,6 +1121,34 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_Avx10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_Avx10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX2)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_FMA)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512F)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512F_VL)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512CD)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512CD_VL)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512BW)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512DQ)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512DQ_VL)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_SSE2)) resultflags.AddInstructionSet(InstructionSet.X64_VectorT128); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX2)) @@ -1140,6 +1236,34 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet.X86_Avx10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_Avx10v1)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX2)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X86_FMA)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512F)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512F_VL)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512CD)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512CD_VL)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512BW)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512BW_VL)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512DQ)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512DQ_VL)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512VBMI)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512VBMI_VL)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X86_SSE2)) resultflags.AddInstructionSet(InstructionSet.X86_VectorT128); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX2)) diff --git a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt index 4f392d21083f8..8e1c280ceee94 100644 --- a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt +++ b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt @@ -93,6 +93,9 @@ instructionset64bit,X86 ,AVX512DQ instructionset64bit,X86 ,AVX512DQ_VL instructionset64bit,X86 ,AVX512VBMI instructionset64bit,X86 ,AVX512VBMI_VL +instructionset64bit,X86 ,Avx10v1 +instructionset64bit,X86 ,Avx10v1_V256 +instructionset64bit,X86 ,Avx10v1_V512 vectorinstructionset,X86 ,Vector128 vectorinstructionset,X86 ,Vector256 @@ -134,6 +137,20 @@ implication ,X86 ,AVX512DQ_VL ,AVX512F_VL implication ,X86 ,AVX512VBMI ,AVX512BW implication ,X86 ,AVX512VBMI_VL ,AVX512VBMI implication ,X86 ,AVX512VBMI_VL ,AVX512BW_VL +implication ,X86 ,AVX10v1_V512 ,Avx10v1_V256 +implication ,X86 ,AVX10v1_V256 ,Avx10v1 +implication ,X86 ,AVX10v1 ,AVX2 +implication ,X86 ,AVX10v1 ,FMA +implication ,X86 ,AVX10v1_V512 ,AVX512F +implication ,X86 ,AVX10v1_V512 ,AVX512F_VL +implication ,X86 ,AVX10v1_V512 ,AVX512CD +implication ,X86 ,AVX10v1_V512 ,AVX512CD_VL +implication ,X86 ,AVX10v1_V512 ,AVX512BW +implication ,X86 ,AVX10v1_V512 ,AVX512BW_VL +implication ,X86 ,AVX10v1_V512 ,AVX512DQ +implication ,X86 ,AVX10v1_V512 ,AVX512DQ_VL +implication ,X86 ,AVX10v1_V512 ,AVX512VBMI +implication ,X86 ,AVX10v1_V512 ,AVX512VBMI_VL implication ,X86 ,VectorT128 ,SSE2 implication ,X86 ,VectorT256 ,AVX2 implication ,X86 ,VectorT512 ,AVX512F From 15d9a47c6b3b56c29294c5ca86e315779b09737f Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 15 Mar 2024 15:07:43 -0700 Subject: [PATCH 5/9] improve the CPUID check logic. --- src/coreclr/vm/codeman.cpp | 4 +-- src/native/minipal/cpufeatures.c | 58 ++++++++++++-------------------- 2 files changed, 24 insertions(+), 38 deletions(-) diff --git a/src/coreclr/vm/codeman.cpp b/src/coreclr/vm/codeman.cpp index 3e7deb9ec0329..ce3ca745aa796 100644 --- a/src/coreclr/vm/codeman.cpp +++ b/src/coreclr/vm/codeman.cpp @@ -1454,12 +1454,12 @@ void EEJitManager::SetCpuInfo() CPUCompileFlags.Set(InstructionSet_AVX10v1); } - if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V256) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V256) != 0)) { CPUCompileFlags.Set(InstructionSet_AVX10v1_V256); } - if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) + if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1_V512) != 0)) { CPUCompileFlags.Set(InstructionSet_AVX10v1_V512); } diff --git a/src/native/minipal/cpufeatures.c b/src/native/minipal/cpufeatures.c index 50df58721d6e9..29bddc112ed9e 100644 --- a/src/native/minipal/cpufeatures.c +++ b/src/native/minipal/cpufeatures.c @@ -277,6 +277,28 @@ int minipal_getcpufeatures(void) { result |= XArchIntrinsicConstants_AvxVnni; } + + if ((cpuidInfo[CPUID_EDX] & (1 << 19)) != 0) // Avx10 + { + __cpuidex(cpuidInfo, 0x00000024, 0x00000000); + const int versionMask = 0xFF; // [7:0] + if((cpuidInfo[CPUID_EBX] & versionMask) >= 1) // version higher than 1 + { + result |= XArchIntrinsicConstants_Avx10v1; + } + + const int vector256Mask = (1 << 17); + const int vector512Mask = (1 << 18); + if((cpuidInfo[CPUID_EBX] & vector256Mask) != 0) + { + result |= XArchIntrinsicConstants_Avx10v1_V256; + } + + if((cpuidInfo[CPUID_EBX] & vector512Mask) != 0) + { + result |= XArchIntrinsicConstants_Avx10v1_V512; + } + } } } } @@ -306,42 +328,6 @@ int minipal_getcpufeatures(void) result |= XArchIntrinsicConstants_Serialize; // SERIALIZE } } - - if (maxCpuId >= 0x07) - { - // Detect Avx10 here. - // Given paradigm: - // 1. CPUID.(EAX=07H, ECX=01H):EDX[bit 19] = 1 -> ISA supported. - // 2. CPUID.(EAX=24H, ECX=00H):EBX[bits 7:0] >= 1 -> ISA version larger than 1. - // with 1,2, set XArchIntrinsicConstants_Avx10_1 - - // 3. CPUID.(EAX=24H, ECX=00H):EBX[bits 18:16] -> vector length support. - __cpuidex(cpuidInfo, 0x00000007, 0x00000001); - if ((cpuidInfo[CPUID_EDX] & (1 << 19)) != 0) // Avx10 supported - { - __cpuidex(cpuidInfo, 0x00000024, 0x00000000); - const int versionMask = 0xFF; // [7:0] - if((cpuidInfo[CPUID_EBX] & versionMask) >= 1) // version higher than 1 - { - result |= XArchIntrinsicConstants_VectorT128; // Avx10 guarantee V128 - result |= XArchIntrinsicConstants_Avx10v1; - } - - const int vector256Mask = (1 << 17); - const int vector512Mask = (1 << 18); - if((cpuidInfo[CPUID_EBX] & vector256Mask) != 0) - { - result |= XArchIntrinsicConstants_VectorT256; - result |= XArchIntrinsicConstants_Avx10v1_V256; - } - - if((cpuidInfo[CPUID_EBX] & vector512Mask) != 0) - { - result |= XArchIntrinsicConstants_VectorT512; - result |= XArchIntrinsicConstants_Avx10v1_V512; - } - } - } } __cpuid(cpuidInfo, 0x80000000); From 8e2f33fa8eaa65c6ddac7b93c596f22b76a44136 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Fri, 15 Mar 2024 15:53:42 -0700 Subject: [PATCH 6/9] Add missing changes in managed code and fix bad naming. --- src/coreclr/inc/corinfoinstructionset.h | 44 ++++++++--- src/coreclr/inc/jiteeversionguid.h | 10 +-- .../Compiler/HardwareIntrinsicHelpers.cs | 15 ++++ .../tools/Common/InstructionSetHelpers.cs | 24 ++++++ .../Runtime/ReadyToRunInstructionSetHelper.cs | 6 ++ .../JitInterface/CorInfoInstructionSet.cs | 79 ++++++++++++++----- .../ThunkGenerator/InstructionSetDesc.txt | 10 +-- 7 files changed, 148 insertions(+), 40 deletions(-) diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h index 3cfebbdf51b78..748b1d553fa71 100644 --- a/src/coreclr/inc/corinfoinstructionset.h +++ b/src/coreclr/inc/corinfoinstructionset.h @@ -110,9 +110,9 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL_X64=65, InstructionSet_AVX512VBMI_X64=66, InstructionSet_AVX512VBMI_VL_X64=67, - InstructionSet_Avx10v1_X64=68, - InstructionSet_Avx10v1_V256_X64=69, - InstructionSet_Avx10v1_V512_X64=70, + InstructionSet_AVX10v1_X64=68, + InstructionSet_AVX10v1_V256_X64=69, + InstructionSet_AVX10v1_V512_X64=70, #endif // TARGET_AMD64 #ifdef TARGET_X86 InstructionSet_X86Base=1, @@ -182,9 +182,9 @@ enum CORINFO_InstructionSet InstructionSet_AVX512DQ_VL_X64=65, InstructionSet_AVX512VBMI_X64=66, InstructionSet_AVX512VBMI_VL_X64=67, - InstructionSet_Avx10v1_X64=68, - InstructionSet_Avx10v1_V256_X64=69, - InstructionSet_Avx10v1_V512_X64=70, + InstructionSet_AVX10v1_X64=68, + InstructionSet_AVX10v1_V256_X64=69, + InstructionSet_AVX10v1_V512_X64=70, #endif // TARGET_X86 }; @@ -358,6 +358,12 @@ struct CORINFO_InstructionSetFlags AddInstructionSet(InstructionSet_AVX512VBMI_X64); if (HasInstructionSet(InstructionSet_AVX512VBMI_VL)) AddInstructionSet(InstructionSet_AVX512VBMI_VL_X64); + if (HasInstructionSet(InstructionSet_AVX10v1)) + AddInstructionSet(InstructionSet_AVX10v1_X64); + if (HasInstructionSet(InstructionSet_AVX10v1_V256)) + AddInstructionSet(InstructionSet_AVX10v1_V256_X64); + if (HasInstructionSet(InstructionSet_AVX10v1_V512)) + AddInstructionSet(InstructionSet_AVX10v1_V512_X64); #endif // TARGET_AMD64 #ifdef TARGET_X86 #endif // TARGET_X86 @@ -554,6 +560,18 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL_X64); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_X64)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_X64); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256_X64)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256_X64); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512_X64)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512_X64) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512_X64); if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base)) resultflags.RemoveInstructionSet(InstructionSet_SSE); if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE)) @@ -626,9 +644,9 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1_V256)) + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1)) + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); @@ -740,9 +758,9 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1_V256)) + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_Avx10v1)) + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); @@ -972,10 +990,16 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet) return "AVX512VBMI_VL_X64"; case InstructionSet_AVX10v1 : return "AVX10v1"; + case InstructionSet_AVX10v1_X64 : + return "AVX10v1_X64"; case InstructionSet_AVX10v1_V256 : return "AVX10v1_V256"; + case InstructionSet_AVX10v1_V256_X64 : + return "AVX10v1_V256_X64"; case InstructionSet_AVX10v1_V512 : return "AVX10v1_V512"; + case InstructionSet_AVX10v1_V512_X64 : + return "AVX10v1_V512_X64"; case InstructionSet_VectorT128 : return "VectorT128"; case InstructionSet_VectorT256 : diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h index 075f102ff884f..c2284e909dc7f 100644 --- a/src/coreclr/inc/jiteeversionguid.h +++ b/src/coreclr/inc/jiteeversionguid.h @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID; #define GUID_DEFINED #endif // !GUID_DEFINED -constexpr GUID JITEEVersionIdentifier = { /* 055345b0-c850-4c0a-9ae0-aa75a684ff01 */ - 0x055345b0, - 0xc850, - 0x4c0a, - {0x9a, 0xe0, 0xaa, 0x75, 0xa6, 0x84, 0xff, 0x01} +constexpr GUID JITEEVersionIdentifier = { /* 521f5004-fdc8-40e9-9568-5c379fa121f2 */ + 0x521f5004, + 0xfdc8, + 0x40e9, + {0x95, 0x68, 0x5c, 0x37, 0x9f, 0xa1, 0x21, 0xf2} }; ////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs b/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs index c30736fcb6019..c6cd56a4c66b9 100644 --- a/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs +++ b/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs @@ -69,6 +69,9 @@ private static class XArchIntrinsicConstants public const int VectorT128 = 0x4000000; public const int VectorT256 = 0x8000000; public const int VectorT512 = 0x10000000; + public const int Avx10v1 = 20000000; + public const int Avx10v1_v256 = 40000000; + public const int Avx10v1_v512 = 50000000; public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags) { @@ -124,6 +127,12 @@ public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags) builder.AddSupportedInstructionSet("avx512vbmi_vl"); if ((flags & Serialize) != 0) builder.AddSupportedInstructionSet("serialize"); + if ((flags & Avx10v1) != 0) + builder.AddSupportedInstructionSet("avx10v1"); + if ((flags & Avx10v1_v256) != 0) + builder.AddSupportedInstructionSet("avx10v1_v256"); + if ((flags & Avx10v1_v512) != 0) + builder.AddSupportedInstructionSet("avx10v1_v512"); } public static int FromInstructionSet(InstructionSet instructionSet) @@ -187,6 +196,12 @@ public static int FromInstructionSet(InstructionSet instructionSet) InstructionSet.X64_AVX512VBMI_VL_X64 => Avx512Vbmi_vl, InstructionSet.X64_X86Serialize => Serialize, InstructionSet.X64_X86Serialize_X64 => Serialize, + InstructionSet.X64_AVX10v1 => Avx10v1, + InstructionSet.X64_AVX10v1_X64 => Avx10v1, + InstructionSet.X64_AVX10v1_V256 => Avx10v1_v256, + InstructionSet.X64_AVX10v1_V256_X64 => Avx10v1_v256, + InstructionSet.X64_AVX10v1_V512 => Avx10v1_v512, + InstructionSet.X64_AVX10v1_V512_X64 => Avx10v1_v512, // Baseline ISAs - they're always available InstructionSet.X64_SSE => 0, diff --git a/src/coreclr/tools/Common/InstructionSetHelpers.cs b/src/coreclr/tools/Common/InstructionSetHelpers.cs index 718053f13d0c3..b3616d1cd8cd1 100644 --- a/src/coreclr/tools/Common/InstructionSetHelpers.cs +++ b/src/coreclr/tools/Common/InstructionSetHelpers.cs @@ -224,6 +224,30 @@ public static InstructionSetSupport ConfigureInstructionSetSupport(string instru optimisticInstructionSetSupportBuilder.AddSupportedInstructionSet("avx512vbmi"); optimisticInstructionSetSupportBuilder.AddSupportedInstructionSet("avx512vbmi_vl"); } + + Debug.Assert(InstructionSet.X64_AVX10v1_V256 == InstructionSet.X86_AVX10v1_V256); + if (supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + { + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX2)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_FMA)); + } + + Debug.Assert(InstructionSet.X64_AVX10v1_V512 == InstructionSet.X86_AVX10v1_V512); + if (supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + { + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512F)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512F_VL)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512BW)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512CD)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512CD_VL)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512DQ)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512DQ_VL)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512VBMI)); + Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)); + } } else if (targetArchitecture == TargetArchitecture.ARM64) { diff --git a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs index f42cc32453e82..533b017e2bae8 100644 --- a/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs +++ b/src/coreclr/tools/Common/Internal/Runtime/ReadyToRunInstructionSetHelper.cs @@ -119,8 +119,11 @@ public static class ReadyToRunInstructionSetHelper case InstructionSet.X64_AVX512VBMI_VL: return ReadyToRunInstructionSet.Avx512Vbmi_VL; case InstructionSet.X64_AVX512VBMI_VL_X64: return ReadyToRunInstructionSet.Avx512Vbmi_VL; case InstructionSet.X64_AVX10v1: return ReadyToRunInstructionSet.Avx10v1; + case InstructionSet.X64_AVX10v1_X64: return ReadyToRunInstructionSet.Avx10v1; case InstructionSet.X64_AVX10v1_V256: return ReadyToRunInstructionSet.Avx10v1_V256; + case InstructionSet.X64_AVX10v1_V256_X64: return ReadyToRunInstructionSet.Avx10v1_V256; case InstructionSet.X64_AVX10v1_V512: return ReadyToRunInstructionSet.Avx10v1_V512; + case InstructionSet.X64_AVX10v1_V512_X64: return ReadyToRunInstructionSet.Avx10v1_V512; case InstructionSet.X64_VectorT128: return ReadyToRunInstructionSet.VectorT128; case InstructionSet.X64_VectorT256: return ReadyToRunInstructionSet.VectorT256; case InstructionSet.X64_VectorT512: return ReadyToRunInstructionSet.VectorT512; @@ -195,8 +198,11 @@ public static class ReadyToRunInstructionSetHelper case InstructionSet.X86_AVX512VBMI_VL: return ReadyToRunInstructionSet.Avx512Vbmi_VL; case InstructionSet.X86_AVX512VBMI_VL_X64: return null; case InstructionSet.X86_AVX10v1: return ReadyToRunInstructionSet.Avx10v1; + case InstructionSet.X86_AVX10v1_X64: return null; case InstructionSet.X86_AVX10v1_V256: return ReadyToRunInstructionSet.Avx10v1_V256; + case InstructionSet.X86_AVX10v1_V256_X64: return null; case InstructionSet.X86_AVX10v1_V512: return ReadyToRunInstructionSet.Avx10v1_V512; + case InstructionSet.X86_AVX10v1_V512_X64: return null; case InstructionSet.X86_VectorT128: return ReadyToRunInstructionSet.VectorT128; case InstructionSet.X86_VectorT256: return ReadyToRunInstructionSet.VectorT256; case InstructionSet.X86_VectorT512: return ReadyToRunInstructionSet.VectorT512; diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs index f79bd66bb5343..bcbb2cd0937a9 100644 --- a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs +++ b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs @@ -108,9 +108,9 @@ public enum InstructionSet X64_AVX512DQ_VL_X64 = InstructionSet_X64.AVX512DQ_VL_X64, X64_AVX512VBMI_X64 = InstructionSet_X64.AVX512VBMI_X64, X64_AVX512VBMI_VL_X64 = InstructionSet_X64.AVX512VBMI_VL_X64, - X64_Avx10v1_X64 = InstructionSet_X64.Avx10v1_X64, - X64_Avx10v1_V256_X64 = InstructionSet_X64.Avx10v1_V256_X64, - X64_Avx10v1_V512_X64 = InstructionSet_X64.Avx10v1_V512_X64, + X64_AVX10v1_X64 = InstructionSet_X64.AVX10v1_X64, + X64_AVX10v1_V256_X64 = InstructionSet_X64.AVX10v1_V256_X64, + X64_AVX10v1_V512_X64 = InstructionSet_X64.AVX10v1_V512_X64, X86_X86Base = InstructionSet_X86.X86Base, X86_SSE = InstructionSet_X86.SSE, X86_SSE2 = InstructionSet_X86.SSE2, @@ -178,9 +178,9 @@ public enum InstructionSet X86_AVX512DQ_VL_X64 = InstructionSet_X86.AVX512DQ_VL_X64, X86_AVX512VBMI_X64 = InstructionSet_X86.AVX512VBMI_X64, X86_AVX512VBMI_VL_X64 = InstructionSet_X86.AVX512VBMI_VL_X64, - X86_Avx10v1_X64 = InstructionSet_X86.Avx10v1_X64, - X86_Avx10v1_V256_X64 = InstructionSet_X86.Avx10v1_V256_X64, - X86_Avx10v1_V512_X64 = InstructionSet_X86.Avx10v1_V512_X64, + X86_AVX10v1_X64 = InstructionSet_X86.AVX10v1_X64, + X86_AVX10v1_V256_X64 = InstructionSet_X86.AVX10v1_V256_X64, + X86_AVX10v1_V512_X64 = InstructionSet_X86.AVX10v1_V512_X64, } public enum InstructionSet_ARM64 { @@ -284,9 +284,9 @@ public enum InstructionSet_X64 AVX512DQ_VL_X64 = 65, AVX512VBMI_X64 = 66, AVX512VBMI_VL_X64 = 67, - Avx10v1_X64 = 68, - Avx10v1_V256_X64 = 69, - Avx10v1_V512_X64 = 70, + AVX10v1_X64 = 68, + AVX10v1_V256_X64 = 69, + AVX10v1_V512_X64 = 70, } public enum InstructionSet_X86 @@ -360,9 +360,9 @@ public enum InstructionSet_X86 AVX512DQ_VL_X64 = 65, AVX512VBMI_X64 = 66, AVX512VBMI_VL_X64 = 67, - Avx10v1_X64 = 68, - Avx10v1_V256_X64 = 69, - Avx10v1_V512_X64 = 70, + AVX10v1_X64 = 68, + AVX10v1_V256_X64 = 69, + AVX10v1_V512_X64 = 70, } public unsafe struct InstructionSetFlags : IEnumerable @@ -698,6 +698,18 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL_X64); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL_X64)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_X64); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256_X64); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512_X64); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_SSE)) resultflags.AddInstructionSet(InstructionSet.X64_X86Base); if (resultflags.HasInstructionSet(InstructionSet.X64_SSE2)) @@ -771,9 +783,9 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X64_Avx10v1_V256); + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X64_Avx10v1); + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X64_AVX2); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) @@ -886,9 +898,9 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X86_Avx10v1_V256); + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X86_Avx10v1); + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X86_AVX2); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) @@ -1049,6 +1061,12 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL_X64)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512_X64)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_X86Base)) resultflags.AddInstructionSet(InstructionSet.X64_SSE); if (resultflags.HasInstructionSet(InstructionSet.X64_SSE)) @@ -1121,9 +1139,9 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet.X64_Avx10v1_V256)) + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X64_Avx10v1)) + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX2)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); @@ -1236,9 +1254,9 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet.X86_Avx10v1_V256)) + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X86_Avx10v1)) + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX2)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); @@ -1520,6 +1538,12 @@ public void Set64BitInstructionSetVariants(TargetArchitecture architecture) AddInstructionSet(InstructionSet.X64_AVX512VBMI_X64); if (HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)) AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL_X64); + if (HasInstructionSet(InstructionSet.X64_AVX10v1)) + AddInstructionSet(InstructionSet.X64_AVX10v1_X64); + if (HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + AddInstructionSet(InstructionSet.X64_AVX10v1_V256_X64); + if (HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + AddInstructionSet(InstructionSet.X64_AVX10v1_V512_X64); break; case TargetArchitecture.X86: @@ -1574,6 +1598,9 @@ public void Set64BitInstructionSetVariantsUnconditionally(TargetArchitecture arc AddInstructionSet(InstructionSet.X64_AVX512DQ_VL_X64); AddInstructionSet(InstructionSet.X64_AVX512VBMI_X64); AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL_X64); + AddInstructionSet(InstructionSet.X64_AVX10v1_X64); + AddInstructionSet(InstructionSet.X64_AVX10v1_V256_X64); + AddInstructionSet(InstructionSet.X64_AVX10v1_V512_X64); break; case TargetArchitecture.X86: @@ -1606,6 +1633,9 @@ public void Set64BitInstructionSetVariantsUnconditionally(TargetArchitecture arc AddInstructionSet(InstructionSet.X86_AVX512DQ_VL_X64); AddInstructionSet(InstructionSet.X86_AVX512VBMI_X64); AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL_X64); + AddInstructionSet(InstructionSet.X86_AVX10v1_X64); + AddInstructionSet(InstructionSet.X86_AVX10v1_V256_X64); + AddInstructionSet(InstructionSet.X86_AVX10v1_V512_X64); break; } } @@ -1884,12 +1914,21 @@ public static InstructionSet LookupPlatformIntrinsicInstructionSet(TargetArchite { return InstructionSet.X64_AVX512VBMI; } case "Avx10v1": + if (nestedTypeName == "X64") + { return InstructionSet.X64_AVX10v1_X64; } + else { return InstructionSet.X64_AVX10v1; } case "Avx10v1_V256": + if (nestedTypeName == "X64") + { return InstructionSet.X64_AVX10v1_V256_X64; } + else { return InstructionSet.X64_AVX10v1_V256; } case "Avx10v1_V512": + if (nestedTypeName == "X64") + { return InstructionSet.X64_AVX10v1_V512_X64; } + else { return InstructionSet.X64_AVX10v1_V512; } case "VectorT128": diff --git a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt index 8e1c280ceee94..073ba5517eebd 100644 --- a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt +++ b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt @@ -93,9 +93,9 @@ instructionset64bit,X86 ,AVX512DQ instructionset64bit,X86 ,AVX512DQ_VL instructionset64bit,X86 ,AVX512VBMI instructionset64bit,X86 ,AVX512VBMI_VL -instructionset64bit,X86 ,Avx10v1 -instructionset64bit,X86 ,Avx10v1_V256 -instructionset64bit,X86 ,Avx10v1_V512 +instructionset64bit,X86 ,AVX10v1 +instructionset64bit,X86 ,AVX10v1_V256 +instructionset64bit,X86 ,AVX10v1_V512 vectorinstructionset,X86 ,Vector128 vectorinstructionset,X86 ,Vector256 @@ -137,8 +137,8 @@ implication ,X86 ,AVX512DQ_VL ,AVX512F_VL implication ,X86 ,AVX512VBMI ,AVX512BW implication ,X86 ,AVX512VBMI_VL ,AVX512VBMI implication ,X86 ,AVX512VBMI_VL ,AVX512BW_VL -implication ,X86 ,AVX10v1_V512 ,Avx10v1_V256 -implication ,X86 ,AVX10v1_V256 ,Avx10v1 +implication ,X86 ,AVX10v1_V512 ,AVX10v1_V256 +implication ,X86 ,AVX10v1_V256 ,AVX10v1 implication ,X86 ,AVX10v1 ,AVX2 implication ,X86 ,AVX10v1 ,FMA implication ,X86 ,AVX10v1_V512 ,AVX512F From cc876a0cc2aa108d49a50aa04539dd3293acfa63 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Mon, 18 Mar 2024 14:03:10 -0700 Subject: [PATCH 7/9] Resolve comments: 1. Make sure the version check and length check are correctly nested. 2. remove unnecessary debug assert in mananged code. --- .../Compiler/HardwareIntrinsicHelpers.cs | 6 ++--- .../tools/Common/InstructionSetHelpers.cs | 24 ----------------- src/native/minipal/cpufeatures.c | 26 +++++++++---------- 3 files changed, 16 insertions(+), 40 deletions(-) diff --git a/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs b/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs index c6cd56a4c66b9..0dafd4b44831e 100644 --- a/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs +++ b/src/coreclr/tools/Common/Compiler/HardwareIntrinsicHelpers.cs @@ -69,9 +69,9 @@ private static class XArchIntrinsicConstants public const int VectorT128 = 0x4000000; public const int VectorT256 = 0x8000000; public const int VectorT512 = 0x10000000; - public const int Avx10v1 = 20000000; - public const int Avx10v1_v256 = 40000000; - public const int Avx10v1_v512 = 50000000; + public const int Avx10v1 = 0x20000000; + public const int Avx10v1_v256 = 0x40000000; + public const int Avx10v1_v512 = unchecked((int)0x80000000); public static void AddToBuilder(InstructionSetSupportBuilder builder, int flags) { diff --git a/src/coreclr/tools/Common/InstructionSetHelpers.cs b/src/coreclr/tools/Common/InstructionSetHelpers.cs index b3616d1cd8cd1..718053f13d0c3 100644 --- a/src/coreclr/tools/Common/InstructionSetHelpers.cs +++ b/src/coreclr/tools/Common/InstructionSetHelpers.cs @@ -224,30 +224,6 @@ public static InstructionSetSupport ConfigureInstructionSetSupport(string instru optimisticInstructionSetSupportBuilder.AddSupportedInstructionSet("avx512vbmi"); optimisticInstructionSetSupportBuilder.AddSupportedInstructionSet("avx512vbmi_vl"); } - - Debug.Assert(InstructionSet.X64_AVX10v1_V256 == InstructionSet.X86_AVX10v1_V256); - if (supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) - { - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX2)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_FMA)); - } - - Debug.Assert(InstructionSet.X64_AVX10v1_V512 == InstructionSet.X86_AVX10v1_V512); - if (supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) - { - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512F)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512F_VL)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512BW)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512CD)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512CD_VL)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512DQ)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512DQ_VL)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512VBMI)); - Debug.Assert(supportedInstructionSet.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)); - } } else if (targetArchitecture == TargetArchitecture.ARM64) { diff --git a/src/native/minipal/cpufeatures.c b/src/native/minipal/cpufeatures.c index 29bddc112ed9e..89b30724aafd1 100644 --- a/src/native/minipal/cpufeatures.c +++ b/src/native/minipal/cpufeatures.c @@ -281,22 +281,22 @@ int minipal_getcpufeatures(void) if ((cpuidInfo[CPUID_EDX] & (1 << 19)) != 0) // Avx10 { __cpuidex(cpuidInfo, 0x00000024, 0x00000000); - const int versionMask = 0xFF; // [7:0] - if((cpuidInfo[CPUID_EBX] & versionMask) >= 1) // version higher than 1 + if((cpuidInfo[CPUID_EBX] & 0xFF) >= 1) // Avx10v1 - CPUID.(EAX=24H, ECX=00H):EBX[7:0] >= 1 { - result |= XArchIntrinsicConstants_Avx10v1; - } + if ((cpuidInfo[CPUID_EBX] & (1 << 16)) != 0) + { + result |= XArchIntrinsicConstants_Avx10v1; + } - const int vector256Mask = (1 << 17); - const int vector512Mask = (1 << 18); - if((cpuidInfo[CPUID_EBX] & vector256Mask) != 0) - { - result |= XArchIntrinsicConstants_Avx10v1_V256; - } + if ((cpuidInfo[CPUID_EBX] & (1 << 17)) != 0) + { + result |= XArchIntrinsicConstants_Avx10v1_V256; + } - if((cpuidInfo[CPUID_EBX] & vector512Mask) != 0) - { - result |= XArchIntrinsicConstants_Avx10v1_V512; + if ((cpuidInfo[CPUID_EBX] & (1 << 18)) != 0) + { + result |= XArchIntrinsicConstants_Avx10v1_V512; + } } } } From 017e73c0d6c7d020ab69c02c423a51014c6ac447 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Tue, 19 Mar 2024 18:15:22 -0700 Subject: [PATCH 8/9] Resolve comment: 1. update the ISA implication --- src/coreclr/inc/corinfoinstructionset.h | 4 ++++ src/coreclr/inc/jiteeversionguid.h | 10 +++++----- .../tools/Common/JitInterface/CorInfoInstructionSet.cs | 8 ++++++++ .../JitInterface/ThunkGenerator/InstructionSetDesc.txt | 1 + src/coreclr/vm/codeman.cpp | 5 +++++ 5 files changed, 23 insertions(+), 5 deletions(-) diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h index 748b1d553fa71..cbaaa6947e18c 100644 --- a/src/coreclr/inc/corinfoinstructionset.h +++ b/src/coreclr/inc/corinfoinstructionset.h @@ -646,6 +646,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) @@ -760,6 +762,8 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h index c2284e909dc7f..75f44091690fb 100644 --- a/src/coreclr/inc/jiteeversionguid.h +++ b/src/coreclr/inc/jiteeversionguid.h @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID; #define GUID_DEFINED #endif // !GUID_DEFINED -constexpr GUID JITEEVersionIdentifier = { /* 521f5004-fdc8-40e9-9568-5c379fa121f2 */ - 0x521f5004, - 0xfdc8, - 0x40e9, - {0x95, 0x68, 0x5c, 0x37, 0x9f, 0xa1, 0x21, 0xf2} +constexpr GUID JITEEVersionIdentifier = { /* 59b817d0-2673-4698-b08c-44b37a4407da */ + 0x59b817d0, + 0x2673, + 0x4698, + {0xb0, 0x8c, 0x44, 0xb3, 0x7a, 0x44, 0x07, 0xda} }; ////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs index bcbb2cd0937a9..30d2e6710655a 100644 --- a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs +++ b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs @@ -784,6 +784,8 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) @@ -899,6 +901,8 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) @@ -1141,6 +1145,8 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX2)) @@ -1256,6 +1262,8 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX2)) diff --git a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt index 073ba5517eebd..74468b4225267 100644 --- a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt +++ b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt @@ -138,6 +138,7 @@ implication ,X86 ,AVX512VBMI ,AVX512BW implication ,X86 ,AVX512VBMI_VL ,AVX512VBMI implication ,X86 ,AVX512VBMI_VL ,AVX512BW_VL implication ,X86 ,AVX10v1_V512 ,AVX10v1_V256 +implication ,X86 ,AVX10v1_V512 ,AVX10v1 implication ,X86 ,AVX10v1_V256 ,AVX10v1 implication ,X86 ,AVX10v1 ,AVX2 implication ,X86 ,AVX10v1 ,FMA diff --git a/src/coreclr/vm/codeman.cpp b/src/coreclr/vm/codeman.cpp index ce3ca745aa796..aefed6811cff4 100644 --- a/src/coreclr/vm/codeman.cpp +++ b/src/coreclr/vm/codeman.cpp @@ -1449,6 +1449,11 @@ void EEJitManager::SetCpuInfo() CPUCompileFlags.Set(InstructionSet_X86Serialize); } + // As Avx10v1_V512 could imply Avx10v1_V256 and Avx10v1, and Avx10v1_V256 could imply Avx10v1 + // then the flag check here can be conducted for only once, and let + // `EnusreValidInstructionSetSupport` to handle the illegal combination. + // To ensure `EnusreValidInstructionSetSupport` handle the dependency correctly, the implication + // defined in InstructionSetDesc.txt should be explicit, no transitive implication should be assumed. if (((cpuFeatures & XArchIntrinsicConstants_Avx10v1) != 0) && CLRConfig::GetConfigValue(CLRConfig::EXTERNAL_EnableAVX10v1)) { CPUCompileFlags.Set(InstructionSet_AVX10v1); From 7a18c1c63406036bf2ff778d12e52fc06b4cb201 Mon Sep 17 00:00:00 2001 From: Ruihan-Yin Date: Wed, 20 Mar 2024 09:40:05 -0700 Subject: [PATCH 9/9] Resolve comments: adjust the order of ISA implication. --- src/coreclr/inc/corinfoinstructionset.h | 20 ++++------ src/coreclr/inc/jiteeversionguid.h | 10 ++--- .../JitInterface/CorInfoInstructionSet.cs | 40 ++++++++----------- .../ThunkGenerator/InstructionSetDesc.txt | 5 +-- 4 files changed, 31 insertions(+), 44 deletions(-) diff --git a/src/coreclr/inc/corinfoinstructionset.h b/src/coreclr/inc/corinfoinstructionset.h index cbaaa6947e18c..e3b57b6a1e043 100644 --- a/src/coreclr/inc/corinfoinstructionset.h +++ b/src/coreclr/inc/corinfoinstructionset.h @@ -644,16 +644,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_FMA)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) @@ -760,16 +758,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet_AVX512VBMI_VL) && !resultflags.HasInstructionSet(InstructionSet_AVX512BW_VL)) resultflags.RemoveInstructionSet(InstructionSet_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) - resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_AVX2)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1) && !resultflags.HasInstructionSet(InstructionSet_FMA)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V256)) + resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F)) resultflags.RemoveInstructionSet(InstructionSet_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX512F_VL)) diff --git a/src/coreclr/inc/jiteeversionguid.h b/src/coreclr/inc/jiteeversionguid.h index 75f44091690fb..0e9f6e2940bcb 100644 --- a/src/coreclr/inc/jiteeversionguid.h +++ b/src/coreclr/inc/jiteeversionguid.h @@ -43,11 +43,11 @@ typedef const GUID *LPCGUID; #define GUID_DEFINED #endif // !GUID_DEFINED -constexpr GUID JITEEVersionIdentifier = { /* 59b817d0-2673-4698-b08c-44b37a4407da */ - 0x59b817d0, - 0x2673, - 0x4698, - {0xb0, 0x8c, 0x44, 0xb3, 0x7a, 0x44, 0x07, 0xda} +constexpr GUID JITEEVersionIdentifier = { /* 3c216494-65f8-49e2-b69a-7f272193bcc6 */ + 0x3c216494, + 0x65f8, + 0x49e2, + {0xb6, 0x9a, 0x7f, 0x27, 0x21, 0x93, 0xbc, 0xc6} }; ////////////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs index 30d2e6710655a..270d4834a9c2b 100644 --- a/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs +++ b/src/coreclr/tools/Common/JitInterface/CorInfoInstructionSet.cs @@ -782,16 +782,14 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512BW_VL); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X64_AVX2); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X64_FMA); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512F); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V512)) @@ -899,16 +897,14 @@ public static InstructionSetFlags ExpandInstructionSetByImplicationHelper(Target resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512VBMI_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512BW_VL); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X86_AVX2); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) resultflags.AddInstructionSet(InstructionSet.X86_FMA); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512F); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V512)) @@ -1143,16 +1139,14 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X64_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) - resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX2)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X64_FMA)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X64_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512F)) resultflags.AddInstructionSet(InstructionSet.X64_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X64_AVX512F_VL)) @@ -1260,16 +1254,14 @@ private static InstructionSetFlags ExpandInstructionSetByReverseImplicationHelpe resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512BW_VL)) resultflags.AddInstructionSet(InstructionSet.X86_AVX512VBMI_VL); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); - if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) - resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX2)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); if (resultflags.HasInstructionSet(InstructionSet.X86_FMA)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V256); + if (resultflags.HasInstructionSet(InstructionSet.X86_AVX10v1_V256)) + resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512F)) resultflags.AddInstructionSet(InstructionSet.X86_AVX10v1_V512); if (resultflags.HasInstructionSet(InstructionSet.X86_AVX512F_VL)) diff --git a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt index 74468b4225267..5f1953f71e919 100644 --- a/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt +++ b/src/coreclr/tools/Common/JitInterface/ThunkGenerator/InstructionSetDesc.txt @@ -137,11 +137,10 @@ implication ,X86 ,AVX512DQ_VL ,AVX512F_VL implication ,X86 ,AVX512VBMI ,AVX512BW implication ,X86 ,AVX512VBMI_VL ,AVX512VBMI implication ,X86 ,AVX512VBMI_VL ,AVX512BW_VL -implication ,X86 ,AVX10v1_V512 ,AVX10v1_V256 -implication ,X86 ,AVX10v1_V512 ,AVX10v1 -implication ,X86 ,AVX10v1_V256 ,AVX10v1 implication ,X86 ,AVX10v1 ,AVX2 implication ,X86 ,AVX10v1 ,FMA +implication ,X86 ,AVX10v1_V256 ,AVX10v1 +implication ,X86 ,AVX10v1_V512 ,AVX10v1_V256 implication ,X86 ,AVX10v1_V512 ,AVX512F implication ,X86 ,AVX10v1_V512 ,AVX512F_VL implication ,X86 ,AVX10v1_V512 ,AVX512CD