ST77903_QSPI_1_6_400_400 DEMO QSPI Doesn't seem to be working properly (AEGHB-624)

[ckls]

Answers checklist.

• I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• I have searched the issue tracker for a similar issue and not found a similar issue.

General issue report

ST77903_QSPI_1_6_400_400 demo
ESP-IDF:master
chip:esp32S3R2

These pin definitions have been modified

#if CONFIG_IDF_TARGET_ESP32S3
/* ESP32-S3 */
#define LCD_SPI_CS (GPIO_NUM_16)
#define LCD_SPI_SCK (GPIO_NUM_17)
#define LCD_SPI_D0 (GPIO_NUM_13)
#define LCD_SPI_D1 (GPIO_NUM_12)
#define LCD_SPI_D2 (GPIO_NUM_11)
#define LCD_SPI_D3 (GPIO_NUM_10)
#define LCD_BACKLED (GPIO_NUM_20)
#endif
#define LCD_RST (GPIO_NUM_14)

I modified these areas to make the code compile and work properly

spi_multi_transaction_t trans_pool_temp = {
    .base = {
        .cmd = LCD_INS_DATA,
        .length = panel->bytes_per_line * 8,
        .addr = ((uint32_t)LCD_CMD_HSYNC) << 8,
        .flags = SPI_TRANS_MODE_QIO,
        .user = (void *)&panel->trans_user,
        //.sct_gap_len = SPI_SEG_GAP_GET_CLK_LEN(SPI_SEG_GAP_GET_US(panel->h_res, panel->bytes_per_line)),
        //The hierarchy here has been modified to move it out of base based on the master's latest status
    },
    .sct_gap_len = SPI_SEG_GAP_GET_CLK_LEN(SPI_SEG_GAP_GET_US(panel->h_res, panel->bytes_per_line)),
};

Phenomenon: Spi Clk pin frequency does not match the set of 40MHz, the Logic analyzer capture only 10MHz, set other frequencies, CLK pin frequency is always only a quarter of the set value, Cs pin does not seem to work properly.

Help: esp-idf need to make what additional settings can make this part of the code work, the screen can not be normal communication brush color bar

Bonus: When I used the GPIO 19 and GPIO 20 pins, configured as a GPIO port, or as an API configured with SPI pins, it seemed like these two pins were still running as USB D + and USB D-, what additional configuration is required

[ckls]

cs and sclk like this

[ckls]

This is my partial log, and it looks like it's working fine, but there is a problem with the measurement output

I (892) main_task: Started on CPU0
D (911) heap_init: New heap initialised at 0x3fce9710
I (916) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
D (925) esp_psram: Allocating block of size 32768 bytes
D (930) intr_alloc: Connected src 52 to int 5 (cpu 0)
I (935) main_task: Calling app_main()
I (940) app_main: hello world
I (943) gpio: GPIO[20]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
I (953) lcd_panel.st77903_qspi: SPI max transfer size: 959KB
D (959) gdma: new group (0) at 0x3fca6828
D (963) gdma: new pair (0,0) at 0x3fca68b0
D (967) gdma: new tx channel (0,0) at 0x3fca67f0
D (972) gdma: new rx channel (0,0) at 0x3fca68d0
D (976) gdma: tx channel (0,0), (4:64) bytes aligned, burst enabled
D (983) gdma: rx channel (0,0), (4:64) bytes aligned, burst enabled
D (989) spi: SPI2 use gpio matrix.
I (993) lcd_panel.st77903_qspi: Init SPI bus[1]
D (998) intr_alloc: Connected src 21 to int 8 (cpu 0)
D (1003) spi_hal: eff: 1000, limit: 80000k(/0), 0 dummy, -1 delay
D (1009) spi_master: SPI2: New device added to CS0, effective clock: 1000000 Hz
I (1016) lcd_panel.st77903_qspi: Create SPI read device[0]
D (1023) spi_hal: eff: 40000, limit: 80000k(/0), 0 dummy, -1 delay
D (1029) spi_master: SPI2: New device added to CS1, effective clock: 40000000 Hz
I (1036) lcd_panel.st77903_qspi: Create SPI write device[1]
I (1043) gpio: GPIO[14]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
I (1063) lcd_panel.st77903_qspi: Frame buffer size: 192000, total: 187KB
I (1063) lcd_panel.st77903_qspi: Bounce buffer size: 8000, total: 23KB
I (1067) lcd_panel.st77903_qspi: Trans pool size: 20, total: 2KB
I (1073) lcd_panel.st77903_qspi: segment_gap_clock_len: 1600
I (1080) lcd_panel.st77903_qspi: segment_interval(us): 42, refresh_delay(ms): 0
D (1088) lcd_panel.st77903_qspi: Create panel @0x3fca8428
I (1093) lcd_panel.st77903_qspi: version: 0.2.0
I (1448) lcd_panel.st77903_qspi: Load memory task start
I (1570) lcd_panel.st77903_qspi: LCD cmd config done
I (1571) lcd_panel.st77903_qspi: Refresh task start
I (1594) lv_port: Read register 0x09 value: 0x0000
I (2604) lv_port: Read register 0x09 value: 0x0000
I (3614) lv_port: Read register 0x09 value: 0x0000
I (3718) lcd_panel.st77903_qspi: FPS: 46

This is my schematic, because GPIO19 temporary driver problems, I temporarily changed the hardware to use TE pin as SCLK

[Lzw655]

Hi @ckls, the component esp_lcd_st77903 which you are using actually should be used with an older version of ESP-IDF. And it needs to be patched with a specific patch. Since the ESP-IDF master branch has merged the feature of the patch, we can offer you a new component this week.

[ckls]

Hi @ckls, the component esp_lcd_st77903 which you are using actually should be used with an older version of ESP-IDF. And it needs to be patched with a specific patch. Since the ESP-IDF master branch has merged the feature of the patch, we can offer you a new component this week.

thanks, I also tried switching commit in master and adding patch, but failed while adding patch, and tried using this demo on the master's latest commit
by the way，How can I use GPIO19 and GPIO20 pin,except use eFuse, I have tried a lot of ways, such as GPIO_RESET_PIN, GPIO_CONFIG, etc. In the end, I found that these two pins are still there.Output waveform, I think it should be occupied by USB, but I don’t know how to close it

[LHYhorion]

esp_lcd_st77903_qspi.zip
You can try using this component, which has been tested and works fine under ESP-IDF master.

[ckls]

esp_lcd_st77903_qspi.zip You can try using this component, which has been tested and works fine under ESP-IDF master.

sorry,I can't set-Target for this demo, i want to set this demo to esp32s3,but something went wrong. i can't compile this demo properly either

[LHYhorion]

Hello, this is not a demo, but a driver component. You need to replace the component in your project.

[ckls]

Hello, this is not a demo, but a driver component. You need to replace the component in your project.

I created a routine based on sip_lcd_touch and this component. As a result, as I encountered before, QSPI did not work normally. I uploaded my engineering file. This is my SCLK and CS waveforms.
project-name.zip

[LHYhorion]

project-name-1.zip
After checking your code, it was found that the issue does not lie in the driver components but rather in multiple errors within the application code. For example, it is necessary to call the esp_lcd_panel_disp_on_off function. Additionally, you need to call the lv_disp_flush_ready function within the lvgl_flush_cb.

[ckls]

project-name-1.zip After checking your code, it was found that the issue does not lie in the driver components but rather in multiple errors within the application code. For example, it is necessary to call the esp_lcd_panel_disp_on_off function. Additionally, you need to call the lv_disp_flush_ready function within the lvgl_flush_cb.

I have used the routine you have modified, and it is still the same problem. I think there are any other configurations that affect the work of this part of the pin.

[LHYhorion]

That would require you to inspect your hardware, as this portion of the code has already been successfully executed and tested on my development board without any issues.

[ckls]

I just modified the settings of the PSRAM section and modified it to QSPI

[LHYhorion]

Perhaps your screen's initialization parameters differ from the defaults. You need to confirm your screen's initialization parameters.

[ckls]

I see that there is no CS corresponding to a set of SCLK on the waveform, so I think it is a problem with the QSPI driver.

Is my configuration pin and what part of the conflict is it?

#define EXAMPLE_LCD_BK_LIGHT_ON_LEVEL 1
#define EXAMPLE_LCD_BK_LIGHT_OFF_LEVEL !EXAMPLE_LCD_BK_LIGHT_ON_LEVEL
#define EXAMPLE_PIN_NUM_BK_LIGHT 20

#define EXAMPLE_LCD_HOST SPI2_HOST
#define EXAMPLE_PIN_NUM_LCD_QSPI_CS 16
#define EXAMPLE_PIN_NUM_LCD_QSPI_PCLK 17
#define EXAMPLE_PIN_NUM_LCD_QSPI_DATA0 13
#define EXAMPLE_PIN_NUM_LCD_QSPI_DATA1 12
#define EXAMPLE_PIN_NUM_LCD_QSPI_DATA2 11
#define EXAMPLE_PIN_NUM_LCD_QSPI_DATA3 10
#define EXAMPLE_PIN_NUM_LCD_RST 14
#define EXAMPLE_LCD_QSPI_H_RES 200
#define EXAMPLE_LCD_QSPI_V_RES 480

[ckls]

Perhaps your screen's initialization parameters differ from the defaults. You need to confirm your screen's initialization parameters.

The screen initialization part, I also tried provided by the manufacturer, but my data does not seem to communicate on the screen

[LHYhorion]

The driver component has been tested, and just now I successfully ran your code on the development board, and everything is working fine. As for your pin issue, it seems there's a problem from the waveform, but the pin sequence appears to be normal. Therefore, I suggest you check your hardware and related configurations.

[ckls]

The driver component has been tested, and just now I successfully ran your code on the development board, and everything is working fine. As for your pin issue, it seems there's a problem from the waveform, but the pin sequence appears to be normal. Therefore, I suggest you check your hardware and related configurations.

Thank you, I found that there is indeed a hardware problem. The schematic diagram is inconsistent with the PCB. This code has been running normally on my hardware.
If I want to add the TE signal to the screen synchronously to this code, I should add it to the driving part

[Horion0415]

Hello, what specific function are you using the TE pin for? You can use this pin in GPIO interrupts.