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[Discussion] Remove the support of ADC2 digital controller on ESP32-S3 and ESP32-C3 (IDFGH-8691) #10135
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Errata in English: https://www.espressif.com/sites/default/files/documentation/esp32-s3_errata_en.pdf
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The suggested ESP-IDF changes sound good to me. Return error, with ability to KConfig old behavior. |
Could you please explain in more details what's wrong with ADC2 on esp32c3? |
@bbinet The ADC oneshot mode is controlled by a digital controller and this digital controller has some deficiencies, a potential issue that we observed is that, on some chips you may get 0 raw result, even if you connect it to a certain level. |
Ok, so the only risk is to get some wrong values (raw value equals 0) from time to time? |
Hi, @bbinet , the 0 result is just one of the potential issues, it appears on some chips. Generally speaking, the results from ADC2 aren't reliable.
I would say no. We can't guarantee other results are correct. |
Thank you @Icarus113 for this information. |
Hi watchers, the code changes for this issue have been merged in to all related releases. If there's no other comments, I'm gonna close this issue in 1 day. |
Hi, |
so what this means is, if continuous sampling adc1 and adc2 simultaneously, then even if sampling starts fine... at any random moment, a spurious If this is correct, then, if user code determines such a failed state has been entered, is it possible to simply reconfigure the adc and start over, or would it require a restart of the entire chip? |
Actually I don't actually know if this will be one of the conditions. (I didn't meet such scenario yet).
The problem is that, there's no flag or similar thing indicating issue happens. And you can't recover it by reconfigure adc or restart the whole chip. The issue is always there. |
strange... either way please leave the functionality available if possible, ie don't deprecate it. I find it very useful and the results I'm getting seem fine. Hopefully it might be fixed in a future revision of the chip. |
ok, so on C3 model A5 is the only one that is on ADC2, ADC1 is A0-A4. |
Due to the hardware limitation of ESP32-S3 and ESP32-C3 (See errata: S3 section 1.1, C3 section 1.1), we plan to remove the support for ADC2 in IDF drivers.
Affected:
For more details and questions, please contact sales@espressif.com.
We would like to adjust IDF drivers as follows:
Suggestions are welcome.
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