Extending this concept to a complete software defined PCIe emulation system

[ohault]

The idea would be to provide a graph based system where PCIe block could be interconnected. Each block could have a role, mode, attribute and sub-block.

I can think of Root Complex(RC), End Point(EP), but also inside a RC, Root Port, RCiEP, i-EP, ...

Transparent bridge and non-transparent bridge(NTB)