From 647581b94d2c58d4cf8eee357866c5b481dea936 Mon Sep 17 00:00:00 2001
From: Mikkel Lynggaard <mikkel.lynggaard@microchip.com>
Date: Thu, 4 Jan 2024 10:07:25 +0100
Subject: [PATCH] APPL-5631 - Updated 100Mpbs delay values and SGPIO2 handler

Review-record: https://bitbucket.microchip.com/projects/UNGE/repos/sw-mesa/pull-requests/469
---
 base/fa/vtss_fa_ts.c                    |  4 ++--
 meba/src/sparx5/meba.c                  | 17 +++++++++++++++++
 mepa/microchip/lan8814/src/lan8814_ts.c |  2 +-
 3 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/base/fa/vtss_fa_ts.c b/base/fa/vtss_fa_ts.c
index 419e050f..ce1e68de 100644
--- a/base/fa/vtss_fa_ts.c
+++ b/base/fa/vtss_fa_ts.c
@@ -941,8 +941,8 @@ static vtss_rc fa_ts_status_change(vtss_state_t *vtss_state, const vtss_port_no_
         tx_delay += 230 * 1000 - 63999;
 
         if (speed == VTSS_SPEED_100M) {   /* APPL-5631: Additional adjustment for 100 Mbps */
-            rx_delay += (1100 * 1000);
-            tx_delay += (1100 * 1000);
+            rx_delay += (2000 * 1000);
+            tx_delay += (2000 * 1000);
         }
         break;
 
diff --git a/meba/src/sparx5/meba.c b/meba/src/sparx5/meba.c
index 8fb73fc8..89ff8098 100644
--- a/meba/src/sparx5/meba.c
+++ b/meba/src/sparx5/meba.c
@@ -1924,6 +1924,8 @@ static mesa_rc sgpio2_handler(meba_inst_t inst,
     mesa_port_no_t    port_no;
     uint32_t          bit;
     mesa_bool_t       sgpio_events_bit[3][MESA_SGPIO_PORTS];
+    mesa_bool_t       activeEvent = false;
+    mesa_sgpio_port_data_t data[MESA_SGPIO_PORTS];
     int               handled = 0;
 
     // Getting SGPIO bit 0 - 2
@@ -1933,6 +1935,7 @@ static mesa_rc sgpio2_handler(meba_inst_t inst,
             return rc; // Don't even re-enable SGPIO2 interrupt
         }
     }
+    repeat_handler:
     for (port_no = 0; port_no < board->port_cnt; port_no++) {
         if (is_sfp_port(board->port[port_no].map.cap)) {
             mesa_bool_t event_detected = false;
@@ -1998,6 +2001,20 @@ static mesa_rc sgpio2_handler(meba_inst_t inst,
 
         }
     }
+    // As SGPIO2 is edge triggered, a new interrupt will only be seen when all
+    // PHY interrups have been handled and cleared. Therefore,
+    // continue to call SGPIO2 handler until all these have been handled and cleared.
+    mesa_sgpio_read(NULL, 0, 2, data);
+    for (bit = 0; bit <= 2; bit++) {
+        // Data is inverted, 0 equals an active event
+        // Check for event on SGPIO2 port 17 and 18
+        activeEvent |= !data[17].value[bit] && sgpio_events_bit[bit][17];
+        activeEvent |= !data[18].value[bit] && sgpio_events_bit[bit][18];
+    }
+    if (activeEvent) {
+        activeEvent = false;
+        goto repeat_handler;
+    }
     return handled ? MESA_RC_OK : MESA_RC_ERROR;
 }
 
diff --git a/mepa/microchip/lan8814/src/lan8814_ts.c b/mepa/microchip/lan8814/src/lan8814_ts.c
index 5b10d7b8..ef93811a 100644
--- a/mepa/microchip/lan8814/src/lan8814_ts.c
+++ b/mepa/microchip/lan8814/src/lan8814_ts.c
@@ -16,7 +16,7 @@ static  uint16_t indy_ing_latencies[MEPA_TS_CLOCK_FREQ_MAX - 1][3] = {
     [MEPA_TS_CLOCK_FREQ_125M] =   {  000, 0000, 00000 },
     [MEPA_TS_CLOCK_FREQ_15625M] = {  000, 0000, 00000 },
     [MEPA_TS_CLOCK_FREQ_200M] =   {  417, 1441, 8380 },
-    [MEPA_TS_CLOCK_FREQ_250M] =   {  415, 1447, 8377 }, // 415 1447
+    [MEPA_TS_CLOCK_FREQ_250M] =   {  415, 627, 8377 }, // 415 1447
 };
 
 static  uint16_t indy_egr_latencies[MEPA_TS_CLOCK_FREQ_MAX - 1][3] = {