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[RVC] Relax instruction alignment constraint when RVC is enabled #124

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Tracked by #125
mortbopet opened this issue Oct 2, 2021 · 0 comments
Closed
Tracked by #125

[RVC] Relax instruction alignment constraint when RVC is enabled #124

mortbopet opened this issue Oct 2, 2021 · 0 comments
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@mortbopet
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mortbopet commented Oct 2, 2021

From the ISA documentation :

We use the term IALIGN (measured in bits) to refer to the instruction-address alignment constraint the implementation enforces. IALIGN is 32 bits in the base ISA, but some ISA extensions, including the compressed ISA extension, relax IALIGN to 16 bits. IALIGN may not take on any value other than 16 or 32.

Currently, a programmer is required to pad the instruction counter with c.nops to re-align the instruction boundary to 32-bits, when going from compressed to expanded instructions.

A solution to this issue should also remove the additional c.nop instructions currently put in the C-ext tests.

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