diff --git a/README.md b/README.md
index 97da478c..1ccd4bf9 100644
--- a/README.md
+++ b/README.md
@@ -1,10 +1,10 @@
 # SPiRA
 
-The goal of SPiRA is develop a framework for IC designers to create and verify cicuit layouts. The framework uses a parameterized methodology that allows designers to generate PCells, apply rule checking, and LVS verification. The framework allows the following, though some parts are still under active development:
+The goal of SPiRA is develop a framework for IC designers to create and verify circuit layouts. The framework uses a parameterized methodology that allows designers to generate PCells, apply rule checking, and LVS verification. The framework allows the following, though some parts are still under active development:
 
 * **RDD**: The newly proposed Python-based PDK schema, called Rule Deck Database. This schema allows connecting directly to Python object trees for advance data manipulation.
 * **PCells**: Layout generators can be created using basic Python. The framework focusses on reducing native Python boiler-plate code to improve design efficiency.
-* **DRC** (experimental): Rule checking are done by placing parameter rescritions, and connecting to a Template Cell created defined in the RDD. 
+* **DRC** (experimental): Rule checking are done by placing parameter descriptions, and connecting to a Template Cell created defined in the RDD. 
 * **LVS** (experimental): A graph network can be extracted using a mesh-to-graph methodology. 
 
 ## Depenencies
diff --git a/demo/pdks/components/junction.py b/demo/pdks/components/junction.py
index 90e34597..fd4eab30 100644
--- a/demo/pdks/components/junction.py
+++ b/demo/pdks/components/junction.py
@@ -10,7 +10,7 @@
 
 
 class Junction(spira.Cell):
-    """ Josephon Junction component for the AIST process. """
+    """ Josephson Junction component for the AIST process. """
 
     metals = param.DataField(fdef_name='create_metal_layers')
     contacts = param.DataField(fdef_name='create_contact_layers')
diff --git a/demo/pdks/process/mitll_pdk/database.py b/demo/pdks/process/mitll_pdk/database.py
index d4714caa..dbdfa73f 100644
--- a/demo/pdks/process/mitll_pdk/database.py
+++ b/demo/pdks/process/mitll_pdk/database.py
@@ -8,8 +8,8 @@
 
 # -------------------------------- Initialize ------------------------------------
 
-RDD.name = 'MiTLL'
-RDD.desc = 'Process fabrication data for the MiTLL process from the USA.'
+RDD.name = 'MITLL'
+RDD.desc = 'Process fabrication data for the MITLL process from the USA.'
 
 # ---------------------------------- GDSII ---------------------------------------
 
diff --git a/demo/projects/tutorials/ex1_database.ipynb b/demo/projects/tutorials/ex1_database.ipynb
index fcd572f7..ecf2a0f3 100644
--- a/demo/projects/tutorials/ex1_database.ipynb
+++ b/demo/projects/tutorials/ex1_database.ipynb
@@ -9,8 +9,8 @@
     "One the most powerful functionalities of SPiRA is effectively connecting data to \n",
     "cell instances. This examples shows how data from the defined RDD are connected\n",
     "to a class using parameters. By connecting parameters to a class through a \n",
-    "field allows the given data to be intersepted and manipulated before fully \n",
-    "commiting it to the class instance."
+    "field allows the given data to be intercepted and manipulated before fully \n",
+    "committing it to the class instance."
    ]
   },
   {
diff --git a/demo/projects/tutorials/ex3_shapes.ipynb b/demo/projects/tutorials/ex3_shapes.ipynb
index abaf4c74..87d03868 100644
--- a/demo/projects/tutorials/ex3_shapes.ipynb
+++ b/demo/projects/tutorials/ex3_shapes.ipynb
@@ -17,7 +17,7 @@
     "## Demonstrates\n",
     "\n",
     "1. How to extend a shape by inheriting and calling `super()`.\n",
-    "2. How to move and rorate a shape.\n",
+    "2. How to move and rotate a shape.\n",
     "3. How to merge the polygons in a shape.\n"
    ]
   },
diff --git a/demo/projects/tutorials/ex4_subcells.ipynb b/demo/projects/tutorials/ex4_subcells.ipynb
index 7fc6ea3a..27a0ab0d 100644
--- a/demo/projects/tutorials/ex4_subcells.ipynb
+++ b/demo/projects/tutorials/ex4_subcells.ipynb
@@ -7,7 +7,7 @@
     "# Subcells\n",
     "\n",
     "Cell references can be added to a cell using the `SRef` class. Created elementals can \n",
-    "also be wrapped with another class and commited to a cell as a subcell."
+    "also be wrapped with another class and committed to a cell as a subcell."
    ]
   },
   {
diff --git a/demo/projects/tutorials/ex5_ports.ipynb b/demo/projects/tutorials/ex5_ports.ipynb
index c1aa19dd..0924713e 100644
--- a/demo/projects/tutorials/ex5_ports.ipynb
+++ b/demo/projects/tutorials/ex5_ports.ipynb
@@ -8,7 +8,7 @@
     "\n",
     "Defining ports in a layout is done using the `create_ports` class method. \n",
     "Ports are objects that connect vertically, such as vias, and terminals \n",
-    "are ports that connect horizontally. In this example a basic transmissionline \n",
+    "are ports that connect horizontally. In this example a basic transmission line \n",
     "is created with two ports connected to the endpoints."
    ]
   },
@@ -24,8 +24,8 @@
     "4. Extend a cell using inheritance.\n",
     "\n",
     "Example `run_ports_1.py` shows how a cell can be extending using inheritance.\n",
-    "This is one of the functamental reasons for implementing the `create_` methods\n",
-    "in the SPiRA framework. It allows us to effectively segragate data members."
+    "This is one of the fundamental reasons for implementing the `create_` methods\n",
+    "in the SPiRA framework. It allows us to effectively segregate data members."
    ]
   },
   {
diff --git a/docs/_build/html/_sources/rdd_schema.rst.txt b/docs/_build/html/_sources/rdd_schema.rst.txt
index 91c90d34..014297f7 100644
--- a/docs/_build/html/_sources/rdd_schema.rst.txt
+++ b/docs/_build/html/_sources/rdd_schema.rst.txt
@@ -33,7 +33,7 @@ The following examples will illustrate each of the mentioned categories. First t
 
     RDD = get_rule_deck()
 
-    RDD.name = 'MiTLL'
+    RDD.name = 'MITLL'
 
     # Define new process tree.
     RDD.METALS = ProcessTree()
@@ -99,7 +99,7 @@ by simply importing the specific process RDD file.
     >>> from spira.rdd.settings import get_rule_deck
     >>> RDD = get_rule_deck()
     >>> RDD.name
-    'MiTLL'
+    'MITLL'
     >>> from pdks import aist
     >>> RDD.name
     'AiST'
diff --git a/docs/_build/html/_static/rdd_schema.rst b/docs/_build/html/_static/rdd_schema.rst
index 91c90d34..014297f7 100644
--- a/docs/_build/html/_static/rdd_schema.rst
+++ b/docs/_build/html/_static/rdd_schema.rst
@@ -33,7 +33,7 @@ The following examples will illustrate each of the mentioned categories. First t
 
     RDD = get_rule_deck()
 
-    RDD.name = 'MiTLL'
+    RDD.name = 'MITLL'
 
     # Define new process tree.
     RDD.METALS = ProcessTree()
@@ -99,7 +99,7 @@ by simply importing the specific process RDD file.
     >>> from spira.rdd.settings import get_rule_deck
     >>> RDD = get_rule_deck()
     >>> RDD.name
-    'MiTLL'
+    'MITLL'
     >>> from pdks import aist
     >>> RDD.name
     'AiST'
diff --git a/docs/developers.rst b/docs/developers.rst
index 76837c85..03c622c0 100644
--- a/docs/developers.rst
+++ b/docs/developers.rst
@@ -4,7 +4,7 @@ Developers
 Documentation for developers for maintaining and extending. Extra information is added
 to better understand specific code implementations.
 
-Distribtuion
+Distribution
 ------------
 
 Uploading package to PyPi using *twine*.
@@ -48,7 +48,7 @@ Coding standards for parsing the correct docs is given in:
 
 * https://github.com/numpy/numpy/blob/master/doc/HOWTO_DOCUMENT.rst.txt
 
-Introduction to Python Virtual Enviroments:
+Introduction to Python Virtual Environments:
 
 * https://realpython.com/python-virtual-environments-a-primer/
 * https://stackoverflow.com/questions/15746675/how-to-write-a-python-module-package
diff --git a/docs/overview.rst b/docs/overview.rst
index 8fc61573..a298173d 100644
--- a/docs/overview.rst
+++ b/docs/overview.rst
@@ -4,7 +4,7 @@ Overview
 **SPiRA**: A parameterized design framework using Python in conjunction 
 with metaprogramming techniques to allow designers to create superconducting 
 and quantum parameterized circuits, while simultaneously checking for design 
-rule errors. Using this parameterized gdsii a new LVS methodology is proposed 
+rule errors. Using this parameterization of GDSII structures, a new LVS methodology is proposed 
 that follows a parameterized hierarchical approach to effectively detect layout 
 primitives and devices. A mesh-to-netlist algorithm is presented that extracts 
 a graph netlist from a circuit layout by first meshing the conducting polygons 
@@ -31,11 +31,11 @@ coherent fashion. The `demo` folder is an example workspace. A workspace consist
 parts:
 
 * PDKs: Folder containing all the fabrication specific data.
-* Projects: Folder containing the Python source file createed using SPiRA.
+* Projects: Folder containing the Python source file created using SPiRA.
 
 **PDKs**
 
-The folder tree of the demo workspace for the pdks are as follows:
+The folder tree of the demo workspace for the PDKs are as follows:
 
 .. code-block:: bash
 
@@ -64,15 +64,15 @@ defined in the `pdks` folder.
         |__ scripts
         |__ tutorials
 
-The *layouts* diretory contains hand-designed-layouts. The SPiRA framework can be used 
-to apply physical design verifiction methods on these layouts, such as DRC and LVS checks.
-The *scripts* folder largly encapsulates layout generators, while the *tutorials* folder 
+The *layouts* directory contains hand-designed-layouts. The SPiRA framework can be used 
+to apply physical design verification methods on these layouts, such as DRC and LVS checks.
+The *scripts* folder largely encapsulates layout generators, while the *tutorials* folder 
 contains extra data.
 
-Each workspace is linked to a single fabrication process, but using mutliple
+Each workspace is linked to a single fabrication process, but using multiple
 fabs is also possible due to the simplicity of the workspace tree. In essence, 
 the workspace can have any structure given that the user compensates for 
-the necessary import changes. But it is highly adviced to use this structure.
+the necessary import changes. But it is highly advised to use this structure.
 
 
 
diff --git a/docs/parameters.rst b/docs/parameters.rst
index cd045566..dbda27c2 100644
--- a/docs/parameters.rst
+++ b/docs/parameters.rst
@@ -11,7 +11,7 @@ Constraints
 Variables
 ---------
 
-Variables are primitive parameters such as intergers and strings.
+Variables are primitive parameters such as integers and strings.
 The following variables are supported and initialized as shown.
 
 * Integer
diff --git a/docs/rdd_schema.rst b/docs/rdd_schema.rst
index 91c90d34..014297f7 100644
--- a/docs/rdd_schema.rst
+++ b/docs/rdd_schema.rst
@@ -33,7 +33,7 @@ The following examples will illustrate each of the mentioned categories. First t
 
     RDD = get_rule_deck()
 
-    RDD.name = 'MiTLL'
+    RDD.name = 'MITLL'
 
     # Define new process tree.
     RDD.METALS = ProcessTree()
@@ -99,7 +99,7 @@ by simply importing the specific process RDD file.
     >>> from spira.rdd.settings import get_rule_deck
     >>> RDD = get_rule_deck()
     >>> RDD.name
-    'MiTLL'
+    'MITLL'
     >>> from pdks import aist
     >>> RDD.name
     'AiST'
diff --git a/spira/core/descriptor.py b/spira/core/descriptor.py
index 65745e2d..907f25e2 100644
--- a/spira/core/descriptor.py
+++ b/spira/core/descriptor.py
@@ -18,7 +18,7 @@ class Via(spira.Cell):
     __keywords__ = ['default', 'fdef_name', 'locked', 'doc']
 
     def __init__(self, **kwargs):
-        self.__doc__ = 'No documenation generated'
+        self.__doc__ = 'No documentation generated'
         if 'doc' in kwargs:
             self.__doc__ = kwargs['doc']
             kwargs.pop('doc')
@@ -54,7 +54,7 @@ def __field_was_stored__(self, obj):
 
     def __get__(self, obj, type=None):
         """
-        Called when retieving a value from an instance.
+        Called when retrieving a value from an instance.
         Following from `via` in __set__, the following
         can be executed:
 
@@ -81,7 +81,7 @@ def __set__(self, obj, value):
         """
         Store the value of the object keyword argument
         in the __store__ variable of the instance. This
-        setter is calle from the FieldInitializer class.
+        setter is called from the FieldInitializer class.
         This is called when creating a class instance:
 
         self -> The Field being set.
diff --git a/spira/gdsii/elemental/port.py b/spira/gdsii/elemental/port.py
index 6af5bd49..960a371d 100644
--- a/spira/gdsii/elemental/port.py
+++ b/spira/gdsii/elemental/port.py
@@ -167,7 +167,7 @@ def move(self, midpoint=(0,0), destination=None, axis=None):
         return self
 
     def stretch(self, stretch_class):
-        """ Stretch port by with the given strecth class. """
+        """ Stretch port by with the given stretch class. """
         p = stretch_class.apply(self.midpoint)
         self.midpoint = p
         return self
@@ -204,7 +204,7 @@ def _update(self, name, layer):
 
 class Port(PortAbstract):
     """ Ports are objects that connect different polygons
-    or references in a layout. Ports represent veritical
+    or references in a layout. Ports represent vertical
     connection such as vias or junctions.
 
     Examples
diff --git a/spira/gdsii/elemental/term.py b/spira/gdsii/elemental/term.py
index 529ce6dd..628641af 100644
--- a/spira/gdsii/elemental/term.py
+++ b/spira/gdsii/elemental/term.py
@@ -10,7 +10,7 @@
 class Term(PortAbstract):
     """
     Terminals are horizontal ports that connect SRef instances
-    in the horizontal plane. They typcially represents the
+    in the horizontal plane. They typically represents the
     i/o ports of a components.
 
     Examples
diff --git a/spira/lpe/structure.py b/spira/lpe/structure.py
index fe934d81..1c48057c 100644
--- a/spira/lpe/structure.py
+++ b/spira/lpe/structure.py
@@ -16,7 +16,7 @@
 
 class ComposeMLayers(__CellContainer__):
     """
-    Decorates all elementas with purpose metal with
+    Decorates all elementals with purpose metal with
     LCells and add them as elementals to the new class.
     """
 
diff --git a/spira/rdd/technology.py b/spira/rdd/technology.py
index 75ea2172..93c8a66c 100644
--- a/spira/rdd/technology.py
+++ b/spira/rdd/technology.py
@@ -151,7 +151,7 @@ def __repr__(self):
 class DynamicDataTree(__DataTree__):
     """
     A hierarchical tree for storing configuration settings,
-    but with delayed initialisation : the initialize-function
+    but with delayed initialization : the initialize-function
     is called only at the moment a value is actually retrieved.
     """
     def __init__(self, **kwargs):