diff --git a/gas/NEWS b/gas/NEWS index 07fe535900c..b993464a67c 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -21,6 +21,8 @@ * Add support for Armv8-R and Armv8.7-A AArch64. +* Add support for DSB memory nXS barrier instruction for Armv8.7 AArch64. + * Add support for Intel TDX instructions. * Add support for Intel Key Locker instructions. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index d17d118cc69..2ec1af4de15 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -6686,12 +6686,49 @@ parse_operands (char *str, const aarch64_opcode *opcode) backtrack_pos = 0; goto failure; } + if (val != PARSE_FAIL + && operands[i] == AARCH64_OPND_BARRIER) + { + /* Regular barriers accept options CRm (C0-C15). + DSB nXS barrier variant accepts values > 15. */ + po_imm_or_fail (0, 15); + } /* This is an extension to accept a 0..15 immediate. */ if (val == PARSE_FAIL) po_imm_or_fail (0, 15); info->barrier = aarch64_barrier_options + val; break; + case AARCH64_OPND_BARRIER_DSB_NXS: + val = parse_barrier (&str); + if (val != PARSE_FAIL) + { + /* DSB nXS barrier variant accept only