SoC/evalsoc: n900 evalsoc has 83 interrupts, vector need 512 bytes align

  LOG: CLICINTCTLBITS : 3
  LOG: CLIC VERSION : 0x0
  LOG: NUM_INTERRUPT : 83
  LOG: MTH : 0
  LOG: NLBITS : 3

Signed-off-by: Huaqi Fang <578567190@qq.com>

SoC/evalsoc/Common/Source/IAR/startup_evalsoc.c

@@ -46,12 +46,12 @@ typedef void(*__fp)(void);
  * if you want to register vector interrupt with new entry,
  * you need to place it in writable section or create a ram vector
  * after bootup.
- * This alignment is set to 256 byte for up to 64 interrupts,
+ * This alignment is set to 512 byte for up to 128 interrupts,
  * If you have more interrupts, you need to adjust the alignment
  * to other value, for details, please check mtvt csr documented
  * in Nuclei RISC-V ISA Spec
  */
-#pragma data_alignment = 256
+#pragma data_alignment = 512
 static const __fp vector_base[SOC_INT_MAX] __attribute__((section (".mintvec"))) = {
     default_intexc_handler,
     default_intexc_handler,
@@ -120,20 +120,38 @@ static const __fp vector_base[SOC_INT_MAX] __attribute__((section (".mintvec")))
 };
 
 #if defined(FLASH_RAM_VECTOR)
-#pragma data_alignment = 256
+#pragma data_alignment = 512
 static __fp vector_base_ram[SOC_INT_MAX] __attribute__((section (".mintvec_rw")));
 
 #if defined(__TEE_PRESENT) && (__TEE_PRESENT == 1)
 static unsigned long vector_base_s_ram[SOC_INT_MAX] __attribute__((section (".sintvec_rw")));
 extern const unsigned long vector_table_s[SOC_INT_MAX];
 #endif
 
+static void copy_vector_table(void *dst, const void *src, size_t cnt)
+{
+    memcpy((void *)dst, (const void *)src, cnt);
+#if (defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1))
+#if (defined(__CCM_PRESENT) && (__CCM_PRESENT == 1))
+    MFlushDCache();
+#endif
+#endif
+#if (defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1))
+#if (defined(__CCM_PRESENT) && (__CCM_PRESENT == 1))
+    MInvalICache();
+#else
+    __FENCE_I();
+#endif
+#endif
+}
+
 static void prepare_ram_vector(void)
 {
-    memcpy((void *)vector_base_ram, (const void *)vector_base, (size_t)(sizeof(__fp) * SOC_INT_MAX));
+    copy_vector_table((void *)vector_base_ram, (const void *)vector_base, (size_t)(sizeof(__fp) * SOC_INT_MAX));
     __RV_CSR_WRITE(CSR_MTVT, (unsigned long)(&vector_base_ram));
+
 #if defined(__TEE_PRESENT) && (__TEE_PRESENT == 1)
-    memcpy((void *)vector_base_s_ram, (const void *)vector_table_s, (size_t)(sizeof(unsigned long) * SOC_INT_MAX));
+    copy_vector_table((void *)vector_base_s_ram, (const void *)vector_table_s, (size_t)(sizeof(unsigned long) * SOC_INT_MAX));
     __RV_CSR_WRITE(CSR_STVT, (unsigned long)(&vector_base_s_ram));
 #endif
 }