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Add cpuid hypervisor support to work with virtualization #17

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Oct 30, 2019
Merged

Add cpuid hypervisor support to work with virtualization #17

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a18376f
Add cpuid hypervisor support to work with visualization
Oct 24, 2019
7d11001
Add VMWare Timing Support when it is under visualization.
Leoyzen Oct 25, 2019
95c8535
check KVM EXPOSE first to make sure everything is right.
Leoyzen Oct 25, 2019
b5b299f
Fix some log issues
Leoyzen Oct 25, 2019
02385d6
fix coding style and some typos
Leoyzen Oct 26, 2019
a0bfeae
fixup! fix coding style and some typos
Leoyzen Oct 27, 2019
f24a7a4
fixup! fix coding style and some typos
Leoyzen Oct 27, 2019
4ef4f74
More accurate to determine whether we already got CPU/FSB Frequency f…
Leoyzen Oct 27, 2019
dc1ce69
fixup! More accurate to determine whether we already got CPU/FSB Freq…
Leoyzen Oct 27, 2019
9bd05a7
Fallback unsafe division into a more safe way in function ScanAmdProc…
Leoyzen Oct 28, 2019
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1 change: 1 addition & 0 deletions Include/Library/OcCpuLib.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,7 @@ typedef struct {
UINT16 PackageCount;
UINT16 CoreCount;
UINT16 ThreadCount;
BOOLEAN Hypervisor;
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//
// Platform-dependent frequency for the Always Running Timer (ART), normally
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27 changes: 21 additions & 6 deletions Library/OcCpuLib/OcCpuLib.c
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Expand Up @@ -1105,8 +1105,8 @@ ScanIntelProcessor (

//
// Calculate number of cores
//
if (Cpu->MaxId >= CPUID_CACHE_PARAMS && Cpu->Model <= CPU_MODEL_PENRYN) {
// If we are under visualization, then we should get topology from acpi as Penryn
if ((Cpu->MaxId >= CPUID_CACHE_PARAMS && Cpu->Model <= CPU_MODEL_PENRYN) || Cpu->Hypervisor) {
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AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &CpuidCacheEax.Uint32, &CpuidCacheEbx.Uint32, NULL, NULL);
if (CpuidCacheEax.Bits.CacheType != CPUID_CACHE_PARAMS_CACHE_TYPE_NULL) {
CoreCount = (UINT16)GetPowerOfTwo32 (CpuidCacheEax.Bits.MaximumAddressableIdsForProcessorCores + 1);
Expand Down Expand Up @@ -1201,7 +1201,11 @@ ScanAmdProcessor (
CofVid = AsmReadMsr64 (K10_PSTATE_STATUS);
CoreFrequencyID = BitFieldRead64 (CofVid, 0, 7);
CoreDivisorID = BitFieldRead64 (CofVid, 8, 13);
Cpu->MaxBusRatio = (UINT8) (CoreFrequencyID / CoreDivisorID * 2);
if (CoreDivisorID > 0ULL){
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Cpu->MaxBusRatio = (UINT8) (CoreFrequencyID / CoreDivisorID * 2);
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} else {
Cpu->MaxBusRatio = 0;
}
//
// Get core count from CPUID
//
Expand All @@ -1226,7 +1230,11 @@ ScanAmdProcessor (
// Core current operating frequency in MHz. CoreCOF = 100 *
// (MSRC001_00[6B:64][CpuFid] + 10h) / (2 ^ MSRC001_00[6B:64][CpuDid]).
//
Cpu->MaxBusRatio = (UINT8)((CoreFrequencyID + 0x10) / Divisor);
if (Divisor > 0ULL){
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Cpu->MaxBusRatio = (UINT8)((CoreFrequencyID + 0x10) / Divisor);
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} else {
Cpu->MaxBusRatio = 0;
}
//
// AMD 15h and 16h CPUs don't support hyperthreading,
// so the core count is equal to the thread count
Expand All @@ -1252,8 +1260,12 @@ ScanAmdProcessor (
//
Cpu->CurBusRatio = Cpu->MaxBusRatio;
Cpu->MinBusRatio = Cpu->MaxBusRatio;

Cpu->FSBFrequency = DivU64x32 (Cpu->CPUFrequency, Cpu->MaxBusRatio);
if (Cpu->MaxBusRatio == 0 || Cpu->Hypervisor) {
// if hypervisor is true, then we just set FSBFrequency
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Cpu->FSBFrequency = 100000000;
} else {
Cpu->FSBFrequency = DivU64x32 (Cpu->CPUFrequency, Cpu->MaxBusRatio);
}
}
}

Expand Down Expand Up @@ -1363,13 +1375,16 @@ OcCpuScanProcessor (
Cpu->ExtFamily = (UINT8) Cpu->CpuidVerEax.Bits.ExtendedFamilyId;
Cpu->Brand = (UINT8) Cpu->CpuidVerEbx.Bits.BrandIndex;
Cpu->Features = (((UINT64) Cpu->CpuidVerEcx.Uint32) << 32ULL) | Cpu->CpuidVerEdx.Uint32;
Cpu->Hypervisor = (BOOLEAN) Cpu->CpuidVerEcx.Bits.HYPERVISOR;
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if (Cpu->Features & CPUID_FEATURE_HTT) {
Cpu->ThreadCount = (UINT16) Cpu->CpuidVerEbx.Bits.MaximumAddressableIdsForLogicalProcessors;
}
}

DEBUG ((DEBUG_INFO, "OCCPU: %a %a\n", "Found", Cpu->BrandString));

DEBUG ((DEBUG_INFO, "OCCPU: Hypervisor: %a\n", Cpu->Hypervisor ? "Yes": "No"));
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DEBUG ((
DEBUG_INFO,
"OCCPU: Signature %0X Stepping %0X Model %0X Family %0X Type %0X ExtModel %0X ExtFamily %0X\n",
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