Vitis project during the Xilinx XACC 2021 school

This project contains some C++ HLS code to accelerate a subpart of the SIFT algorithm on Xilinx FPGA with the Vitis software. See the original paper of SIFT (published at ICCV 1999 by David Lowe) and a complete implementation of it.

This project derives from the Difference of Gaussian HLS kernel of the Vitis vision library. Host code uses OpenCL. Kernel code uses HLS DATAFLOW pragma and set the stream depths.