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python3 ./util/generate_build_files.py
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@skmcgrail
skmcgrail committed Aug 20, 2024
1 parent 651ecf5 commit 6ba8d18
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Showing 9 changed files with 73 additions and 228 deletions.
47 changes: 12 additions & 35 deletions generated-src/ios-arm/crypto/fipsmodule/sha1-armv4-large.S
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Original file line number Diff line number Diff line change
Expand Up @@ -14,27 +14,14 @@
.code 32
#endif

.globl _sha1_block_data_order
.private_extern _sha1_block_data_order
.globl _sha1_block_data_order_nohw
.private_extern _sha1_block_data_order_nohw
#ifdef __thumb2__
.thumb_func _sha1_block_data_order
.thumb_func _sha1_block_data_order_nohw
#endif

.align 5
_sha1_block_data_order:
#if __ARM_MAX_ARCH__>=7
Lsha1_block:
adr r3,Lsha1_block
ldr r12,LOPENSSL_armcap
ldr r12,[r3,r12] @ OPENSSL_armcap_P
#ifdef __APPLE__
ldr r12,[r12]
#endif
tst r12,#ARMV8_SHA1
bne LARMv8
tst r12,#ARMV7_NEON
bne LNEON
#endif
_sha1_block_data_order_nohw:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
add r2,r1,r2,lsl#6 @ r2 to point at the end of r1
ldmia r0,{r3,r4,r5,r6,r7}
Expand Down Expand Up @@ -492,23 +479,20 @@ LK_00_19:.word 0x5a827999
LK_20_39:.word 0x6ed9eba1
LK_40_59:.word 0x8f1bbcdc
LK_60_79:.word 0xca62c1d6
#if __ARM_MAX_ARCH__>=7
LOPENSSL_armcap:
.word OPENSSL_armcap_P-Lsha1_block
#endif
.byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,52,47,78,69,79,78,47,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 2
.align 5
#if __ARM_MAX_ARCH__>=7



.globl _sha1_block_data_order_neon
.private_extern _sha1_block_data_order_neon
#ifdef __thumb2__
.thumb_func sha1_block_data_order_neon
.thumb_func _sha1_block_data_order_neon
#endif
.align 4
sha1_block_data_order_neon:
LNEON:
_sha1_block_data_order_neon:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
add r2,r1,r2,lsl#6 @ r2 to point at the end of r1
@ dmb @ errata #451034 on early Cortex A8
Expand Down Expand Up @@ -1364,12 +1348,13 @@ Loop_neon:
# define INST(a,b,c,d) .byte a,b,c,d|0x10
# endif

.globl _sha1_block_data_order_hw
.private_extern _sha1_block_data_order_hw
#ifdef __thumb2__
.thumb_func sha1_block_data_order_armv8
.thumb_func _sha1_block_data_order_hw
#endif
.align 5
sha1_block_data_order_armv8:
LARMv8:
_sha1_block_data_order_hw:
vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so

veor q1,q1,q1
Expand Down Expand Up @@ -1498,13 +1483,5 @@ Loop_v8:
vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
bx lr @ bx lr

#endif
#if __ARM_MAX_ARCH__>=7
.comm _OPENSSL_armcap_P,4
.non_lazy_symbol_pointer
OPENSSL_armcap_P:
.indirect_symbol _OPENSSL_armcap_P
.long 0
.private_extern _OPENSSL_armcap_P
#endif
#endif // !OPENSSL_NO_ASM && defined(OPENSSL_ARM) && defined(__APPLE__)
57 changes: 15 additions & 42 deletions generated-src/ios-arm/crypto/fipsmodule/sha256-armv4.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -90,37 +90,18 @@ K256:
.word 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2

.word 0 @ terminator
#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
LOPENSSL_armcap:
.word OPENSSL_armcap_P-Lsha256_block_data_order
#endif
.align 5

.globl _sha256_block_data_order
.private_extern _sha256_block_data_order
.globl _sha256_block_data_order_nohw
.private_extern _sha256_block_data_order_nohw
#ifdef __thumb2__
.thumb_func _sha256_block_data_order
#endif
_sha256_block_data_order:
Lsha256_block_data_order:
adr r3,Lsha256_block_data_order
#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
ldr r12,LOPENSSL_armcap
ldr r12,[r3,r12] @ OPENSSL_armcap_P
#ifdef __APPLE__
ldr r12,[r12]
#endif
tst r12,#ARMV8_SHA256
bne LARMv8
tst r12,#ARMV7_NEON
bne LNEON
.thumb_func _sha256_block_data_order_nohw
#endif
_sha256_block_data_order_nohw:
add r2,r1,r2,lsl#6 @ len to point at the end of inp
stmdb sp!,{r0,r1,r2,r4-r11,lr}
ldmia r0,{r4,r5,r6,r7,r8,r9,r10,r11}
@ TODO(davidben): When the OPENSSL_armcap logic above is removed,
@ replace this with a simple ADR.
sub r14,r3,#256+32 @ K256
adr r14,K256
sub sp,sp,#16*4 @ alloca(X[16])
Loop:
# if __ARM_ARCH>=7
Expand Down Expand Up @@ -1903,7 +1884,6 @@ LK256_shortcut_neon:
.align 5
.skip 16
_sha256_block_data_order_neon:
LNEON:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}

sub r11,sp,#16*4+16
Expand Down Expand Up @@ -2703,25 +2683,26 @@ L_00_48:
# define INST(a,b,c,d) .byte a,b,c,d
# endif

LK256_shortcut_armv8:
LK256_shortcut_hw:
@ PC is 8 bytes ahead in Arm mode and 4 bytes ahead in Thumb mode.
#if defined(__thumb2__)
.word K256-(LK256_add_armv8+4)
.word K256-(LK256_add_hw+4)
#else
.word K256-(LK256_add_armv8+8)
.word K256-(LK256_add_hw+8)
#endif

.globl _sha256_block_data_order_hw
.private_extern _sha256_block_data_order_hw
#ifdef __thumb2__
.thumb_func sha256_block_data_order_armv8
.thumb_func _sha256_block_data_order_hw
#endif
.align 5
sha256_block_data_order_armv8:
LARMv8:
_sha256_block_data_order_hw:
@ K256 is too far to reference from one ADR command in Thumb mode. In
@ Arm mode, we could make it fit by aligning the ADR offset to a 64-byte
@ boundary. For simplicity, just load the offset from .LK256_shortcut_armv8.
ldr r3,LK256_shortcut_armv8
LK256_add_armv8:
@ boundary. For simplicity, just load the offset from .LK256_shortcut_hw.
ldr r3,LK256_shortcut_hw
LK256_add_hw:
add r3,pc,r3

vld1.32 {q0,q1},[r0]
Expand Down Expand Up @@ -2861,12 +2842,4 @@ Loop_v8:
.byte 83,72,65,50,53,54,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,52,47,78,69,79,78,47,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 2
.align 2
#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
.comm _OPENSSL_armcap_P,4
.non_lazy_symbol_pointer
OPENSSL_armcap_P:
.indirect_symbol _OPENSSL_armcap_P
.long 0
.private_extern _OPENSSL_armcap_P
#endif
#endif // !OPENSSL_NO_ASM && defined(OPENSSL_ARM) && defined(__APPLE__)
39 changes: 5 additions & 34 deletions generated-src/ios-arm/crypto/fipsmodule/sha512-armv4.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -135,36 +135,16 @@ K512:
WORD64(0x4cc5d4be,0xcb3e42b6, 0x597f299c,0xfc657e2a)
WORD64(0x5fcb6fab,0x3ad6faec, 0x6c44198c,0x4a475817)

#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
LOPENSSL_armcap:
.word OPENSSL_armcap_P-Lsha512_block_data_order
.skip 32-4
#else
.skip 32
#endif

.globl _sha512_block_data_order
.private_extern _sha512_block_data_order
.globl _sha512_block_data_order_nohw
.private_extern _sha512_block_data_order_nohw
#ifdef __thumb2__
.thumb_func _sha512_block_data_order
#endif
_sha512_block_data_order:
Lsha512_block_data_order:
adr r3,Lsha512_block_data_order
#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
ldr r12,LOPENSSL_armcap
ldr r12,[r3,r12] @ OPENSSL_armcap_P
#ifdef __APPLE__
ldr r12,[r12]
#endif
tst r12,#ARMV7_NEON
bne LNEON
.thumb_func _sha512_block_data_order_nohw
#endif
_sha512_block_data_order_nohw:
add r2,r1,r2,lsl#7 @ len to point at the end of inp
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
@ TODO(davidben): When the OPENSSL_armcap logic above is removed,
@ replace this with a simple ADR.
sub r14,r3,#672 @ K512
adr r14,K512
sub sp,sp,#9*8

ldr r7,[r0,#32+LO]
Expand Down Expand Up @@ -551,7 +531,6 @@ L16_79:
#endif
.align 4
_sha512_block_data_order_neon:
LNEON:
dmb @ errata #451034 on early Cortex A8
add r2,r1,r2,lsl#7 @ len to point at the end of inp
adr r3,K512
Expand Down Expand Up @@ -1877,12 +1856,4 @@ L16_79_neon:
.byte 83,72,65,53,49,50,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,52,47,78,69,79,78,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 2
.align 2
#if __ARM_MAX_ARCH__>=7 && !defined(__KERNEL__)
.comm _OPENSSL_armcap_P,4
.non_lazy_symbol_pointer
OPENSSL_armcap_P:
.indirect_symbol _OPENSSL_armcap_P
.long 0
.private_extern _OPENSSL_armcap_P
#endif
#endif // !OPENSSL_NO_ASM && defined(OPENSSL_ARM) && defined(__APPLE__)
43 changes: 12 additions & 31 deletions generated-src/linux-arm/crypto/fipsmodule/sha1-armv4-large.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,25 +14,12 @@
.code 32
#endif

.globl sha1_block_data_order
.hidden sha1_block_data_order
.type sha1_block_data_order,%function
.globl sha1_block_data_order_nohw
.hidden sha1_block_data_order_nohw
.type sha1_block_data_order_nohw,%function

.align 5
sha1_block_data_order:
#if __ARM_MAX_ARCH__>=7
.Lsha1_block:
adr r3,.Lsha1_block
ldr r12,.LOPENSSL_armcap
ldr r12,[r3,r12] @ OPENSSL_armcap_P
#ifdef __APPLE__
ldr r12,[r12]
#endif
tst r12,#ARMV8_SHA1
bne .LARMv8
tst r12,#ARMV7_NEON
bne .LNEON
#endif
sha1_block_data_order_nohw:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
add r2,r1,r2,lsl#6 @ r2 to point at the end of r1
ldmia r0,{r3,r4,r5,r6,r7}
Expand Down Expand Up @@ -483,28 +470,25 @@ sha1_block_data_order:
moveq pc,lr @ be binary compatible with V4, yet
.word 0xe12fff1e @ interoperable with Thumb ISA:-)
#endif
.size sha1_block_data_order,.-sha1_block_data_order
.size sha1_block_data_order_nohw,.-sha1_block_data_order_nohw

.align 5
.LK_00_19:.word 0x5a827999
.LK_20_39:.word 0x6ed9eba1
.LK_40_59:.word 0x8f1bbcdc
.LK_60_79:.word 0xca62c1d6
#if __ARM_MAX_ARCH__>=7
.LOPENSSL_armcap:
.word OPENSSL_armcap_P-.Lsha1_block
#endif
.byte 83,72,65,49,32,98,108,111,99,107,32,116,114,97,110,115,102,111,114,109,32,102,111,114,32,65,82,77,118,52,47,78,69,79,78,47,65,82,77,118,56,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
.align 2
.align 5
#if __ARM_MAX_ARCH__>=7
.arch armv7-a
.fpu neon

.globl sha1_block_data_order_neon
.hidden sha1_block_data_order_neon
.type sha1_block_data_order_neon,%function
.align 4
sha1_block_data_order_neon:
.LNEON:
stmdb sp!,{r4,r5,r6,r7,r8,r9,r10,r11,r12,lr}
add r2,r1,r2,lsl#6 @ r2 to point at the end of r1
@ dmb @ errata #451034 on early Cortex A8
Expand Down Expand Up @@ -1360,10 +1344,11 @@ sha1_block_data_order_neon:
# define INST(a,b,c,d) .byte a,b,c,d|0x10
# endif

.type sha1_block_data_order_armv8,%function
.globl sha1_block_data_order_hw
.hidden sha1_block_data_order_hw
.type sha1_block_data_order_hw,%function
.align 5
sha1_block_data_order_armv8:
.LARMv8:
sha1_block_data_order_hw:
vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so

veor q1,q1,q1
Expand Down Expand Up @@ -1491,10 +1476,6 @@ sha1_block_data_order_armv8:

vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
bx lr @ bx lr
.size sha1_block_data_order_armv8,.-sha1_block_data_order_armv8
#endif
#if __ARM_MAX_ARCH__>=7
.comm OPENSSL_armcap_P,4,4
.hidden OPENSSL_armcap_P
.size sha1_block_data_order_hw,.-sha1_block_data_order_hw
#endif
#endif // !OPENSSL_NO_ASM && defined(OPENSSL_ARM) && defined(__ELF__)
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