JIT: Fix overzealous assert in CodeGen::genSSE42Intrinsic

[amanasifkhalid]

Fixes #105821.

[amanasifkhalid]

cc @dotnet/jit-contrib

[jakobbotsch]

Isn't the assert fine? If it triggers it should mean problems. We would override the "data" (in op2) with the current CRC value (in op1Reg), since targetReg and op2Reg coincide.

What are the registers in this case?

[jakobbotsch]

I think the assert should instead be:

assert(!op2->isUsedFromReg() || (op2->GetRegNum() != targetReg) || (op1Reg == targetReg));

[tannergooding]

!op2->isUsedFromReg()

Are we getting register assignments when we aren't used from reg?

[jakobbotsch]

Evidently so. In this case op2 is used from a spill temp, so it needs a register to compute the def into. However, it would probably be possible for codegen to unset the register assignment as part of processing the def.

[tannergooding]

That definitely seems like a safer and more robust long term solution; but probably not something we want for .NET 9

I think your proposed assert handles it well enough for the short term fix. We do indeed need to ensure that the mov tgt, op1 isn't overwriting op2, as that would produce incorrect results (and likely mean we forgot a delayFree somewhere).

[amanasifkhalid]

What are the registers in this case?
targetReg and op2->GetRegNum() are rax, op1Reg is rdx.

Thanks for the proposed assert, and for opening an issue. I think you're right that we didn't unset the register assignment for op2 somewhere -- the updated assert works.