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JIT: Add simple late layout pass #107483

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merged 2 commits into from
Sep 10, 2024
Merged

JIT: Add simple late layout pass #107483

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e348e31
Add late layout pass
amanasifkhalid Sep 6, 2024
dbb3187
Add config check
amanasifkhalid Sep 6, 2024
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26 changes: 22 additions & 4 deletions src/coreclr/jit/compiler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5238,11 +5238,12 @@ void Compiler::compCompile(void** methodCodePtr, uint32_t* methodCodeSize, JitFl
m_pLowering->FinalizeOutgoingArgSpace();

// We can not add any new tracked variables after this point.
lvaTrackedFixed = true;
lvaTrackedFixed = true;
const unsigned numBlocksBeforeLSRA = fgBBcount;

// Now that lowering is completed we can proceed to perform register allocation
//
auto linearScanPhase = [this]() {
auto linearScanPhase = [this] {
m_pLinearScan->doLinearScan();
};
DoPhase(this, PHASE_LINEAR_SCAN, linearScanPhase);
Expand All @@ -5252,8 +5253,25 @@ void Compiler::compCompile(void** methodCodePtr, uint32_t* methodCodeSize, JitFl

if (opts.OptimizationEnabled())
{
// LSRA and stack level setting can modify the flowgraph.
// Now that it won't change, run post-layout optimizations.
// LSRA may introduce new blocks. If it does, rerun layout.
if ((fgBBcount != numBlocksBeforeLSRA) && JitConfig.JitDoReversePostOrderLayout())
{
auto lateLayoutPhase = [this] {
fgDoReversePostOrderLayout();
fgMoveColdBlocks();
return PhaseStatus::MODIFIED_EVERYTHING;
};

DoPhase(this, PHASE_OPTIMIZE_LAYOUT, lateLayoutPhase);

if (fgFirstColdBlock != nullptr)
{
fgFirstColdBlock = nullptr;
DoPhase(this, PHASE_DETERMINE_FIRST_COLD_BLOCK, &Compiler::fgDetermineFirstColdBlock);
}
}

// Now that the flowgraph is finalized, run post-layout optimizations.
DoPhase(this, PHASE_OPTIMIZE_POST_LAYOUT, &Compiler::optOptimizePostLayout);
}

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