boot: rewrite assembly version of set_up_page_tables in Zig

src/boot/long_mode.asm

@@ -188,6 +188,7 @@ tss64:
 	           dw 0 ; Reserved
 	.iopb      dw 0 ; no IOPB
 
+extern set_up_page_tables
 extern map_kernel_code_segment
 extern map_kernel_data_segment
 extern map_kernel_stack

src/boot/paging.asm

@@ -1,16 +1,7 @@
-global p4_table
-global p2_table
-
 section .bss
 
 ; Ensures page alignment
 align 4096
-p4_table:
-    resb 4096
-p3_table:
-    resb 4096
-p2_table:
-    resb 4096
 temp_stack:
 	resb 4096
 temp_stack_top:
@@ -25,27 +16,7 @@ NUM_FRAME_BUFFER_PAGES: equ 3
 IST1_TOP: equ (2 << 20) * (NUM_PAGES+NUM_KERNEL_STACK_PAGES-2)
 STACK_TOP: equ (2 << 20) * (NUM_PAGES+NUM_KERNEL_STACK_PAGES-1)
 
-PRESENT:     equ 0x1
-WRITABLE:    equ 0x2
-USER_ACCESS: equ 0x4
-PAGE_SIZE:   equ 0x80
-
 CR0_WRITE_PROTECT: equ 1 << 16
-CR0_PAGING: equ 1 << 31
 
 section .text
 bits 32
-set_up_page_tables:
-	; Map the first P4 entry to P3 table.
-	mov eax, p3_table
-	; Set flags `present` and `writeable`.
-	or eax, PRESENT|WRITABLE|USER_ACCESS
-	mov [p4_table], eax
-
-	; Map the first P3 entry to P2 table.
-	mov eax, p2_table
-	; Set flags `present` and `writeable`.
-	or eax, PRESENT|WRITABLE|USER_ACCESS
-	mov [p3_table], eax
-
-	ret

src/boot/paging_32.zig

@@ -1,7 +1,9 @@
+const std = @import("std");
 const zasm = @import("zasm");
 
-extern var p4_table: [512]u64 align(4096); // [4096]u8
-extern var p2_table: [512]u64 align(4096); // [4096]u8
+export var p4_table: [512]u64 align(4096) = std.mem.zeroes([512]u64); // [4096]u8
+export var p3_table: [512]u64 align(4096) = std.mem.zeroes([512]u64); // [4096]u8
+export var p2_table: [512]u64 align(4096) = std.mem.zeroes([512]u64); // [4096]u8
 
 // NUM_KERNEL_CODE_PAGES + NUM_KERNEL_DATA_PAGES = 32 (NUM_PAGES)
 const NUM_KERNEL_CODE_PAGES = 1;
@@ -18,6 +20,38 @@ const P2_FRAME_BUFFER_FIRST_INDEX = P2_KERNEL_STACK_FIRST_INDEX + NUM_KERNEL_STA
 
 const page_size = zasm.PageSize.Size2MiB.bytes(); // 2 * 1024 * 1024 = 0x200000
 
+export fn set_up_page_tables() void {
+    // Map the first P4 entry to P3 table.
+    var p4_page_table_entry = zasm.PageTableEntry.init();
+    // Set flags `present`, `writeable` and `user accessible`.
+    var p4_page_table_flags = p4_page_table_entry.getFlags();
+    p4_page_table_flags.present = true;
+    p4_page_table_flags.writeable = true;
+    p4_page_table_flags.user_accessible = true;
+    p4_page_table_entry.setFlags(p4_page_table_flags);
+    // Set address of page table entry.
+    const raw_p3_addr = @intCast(u64, @ptrToInt(&p3_table[0]));
+    var p3_addr = zasm.PhysAddr.initUnchecked(raw_p3_addr);
+    p4_page_table_entry.setAddr(p3_addr);
+    // Set page table entry.
+    p4_table[0] = p4_page_table_entry.entry;
+
+    // Map the first P3 entry to P2 table.
+    var p3_page_table_entry = zasm.PageTableEntry.init();
+    // Set flags `present`, `writeable` and `user accessible`.
+    var p3_page_table_flags = p3_page_table_entry.getFlags();
+    p3_page_table_flags.present = true;
+    p3_page_table_flags.writeable = true;
+    p3_page_table_flags.user_accessible = true;
+    p3_page_table_entry.setFlags(p3_page_table_flags);
+    // Set address of page table entry.
+    const raw_p2_addr = @intCast(u64, @ptrToInt(&p2_table[0]));
+    var p2_addr = zasm.PhysAddr.initUnchecked(raw_p2_addr);
+    p3_page_table_entry.setAddr(p2_addr);
+    // Set page table entry.
+    p3_table[0] = p3_page_table_entry.entry;
+}
+
 export fn map_kernel_code_segment() void {
     var page_table_entry = zasm.PageTableEntry.init();
     // Set flags `present`, `writeable`, `user accessible` and `page size`.