core/bytes: Tweak index_byte/last_index_byte
#4101
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Feoramund
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Aug 18, 2024
- Assume unaligned loads are cheap - Explicilty use 256-bit or 128-bit SIMD to avoid AVX512 - Limit "vectorized" scanning to 128-bits if SIMD is emulated via SWAR - Add a few more benchmark cases
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I also think
last_index_bytewould crash ifs == nil(at least it looks suspicious). This is objectively worse on hugeswith the character at the tail, if the starting address is not 16 or 32-byte aligned (depending on microarch), because the penalties will add up. I don't particularly think that case is worth optimizing for (and this has a code-path for < 4*SIMD_REG_SIZE), so it should be better on reasonable inputs.