Add RVV segment load/store instructions

[wangpc-pp]

This is needed by golang (and maybe other languages) porting.

We set nf field explicitly.

[wangpc-pp]

cc @4a6f656c

[sequencer]

See

riscv-opcodes/arg_lut.csv

Line 45 in 07b21cc

"nf", 31, 29

[wangpc-pp]

See

riscv-opcodes/arg_lut.csv

Line 45 in 07b21cc

"nf", 31, 29

I don't get it, what do you mean here? We should remove it from this table?

[sequencer]

nf is already encoded in arg_lut, explicit using them in the table is strange, and may break the backward compatibility.

[wangpc-pp]

nf is already encoded in arg_lut, explicit using them in the table is strange, and may break the backward compatibility.

We can just remove it. Currenly, we don't generate memonics for segment load/store in both Golang/Rust. Yes, it is OK for Chisel and other HDL targets, but it is necessary for software porting.

[sequencer]

I see, adding seg load store instruction explicitly look good to me. If this is merged, we can follow it.

[wangpc-pp]

Ping.