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Register pair instructions should use a (rx, ry)
syntax
#14
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Good point, can we expect tools to understand both these syntax variants (and support emitting them in an objdump)? Also, how is this handled for the |
If you define the syntax in the specification, then you should be able to expect that tools support them. However, I don't necessarily think it's a good idea to specify two different syntax forms, since that could also be confusing. Hence, in my opinion, the best solution would be to mandate the |
I appreciate your comment. However, any such solution would have to maintain consistency with Zdinx. This is an already ratified extension, so we cannot change it. Do you have a proposal to address this consistently? |
arm uses straightforward |
Which version of ldrd/strd are you referring to? If you look at ARMv5TE, you will find this:
|
Well, consistency between the extensions is very important, so a new syntax for register pairs should work with Zdinx instructions as well. Given that, I think the best solution is to support both forms -- for all instructions that operator on register pairs. |
Are you aware of a RISC-V instruction with two possible syntax forms? |
T2, just checked and it does actually address 2 independent registers even though all code samples always use consecutive. (n, n+1) T2 (and A64) like syntax can still be used for a forced n+1 as well. |
I just went through the isa manual. RISC-V defines one and only one mnemonic per encoding. |
When reading and writing assembly programs, it must be 100% clear where processor registers are accessed. Normally, all processor registers that you access are directly visible in the assembly source file. A programmer can use basic tools like "search" in their text editor to find all occurrences of a specific processor register.
However, the new instructions that operate on registers pairs doesn't follow this basic principle. For example, in the following snippet, it looks like
t1
is defined but never used.If you tweak the syntax so that register pair instructions use the syntax
(t1, t0)
the code will be easier to understand, since it would be clear wheret1
is used:My guess that the single register syntax was picked since the underlying encoding use a single register. However, for an assembly programmer, it is more important that the syntax corresponds to the semantic of the instruction rather than the encoding.
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