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fix(IsEqual): alloc value_inv with closure
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johntaiko committed Jun 21, 2023
1 parent 2633c29 commit e960000
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Showing 3 changed files with 12 additions and 6 deletions.
15 changes: 10 additions & 5 deletions gadgets/src/is_equal.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
use eth_types::Field;
use halo2_proofs::{
circuit::{Chip, Region, Value},
plonk::{ConstraintSystem, Error, Expression, SecondPhase, VirtualCells},
plonk::{Advice, Column, ConstraintSystem, Error, Expression, SecondPhase, VirtualCells},

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unused import: `SecondPhase`

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unused import: `SecondPhase`

error: unused import: `SecondPhase` --> gadgets/src/is_equal.rs:6:66 | 6 | plonk::{Advice, Column, ConstraintSystem, Error, Expression, SecondPhase, VirtualCells}, | ^^^^^^^^^^^ | = note: `-D unused-imports` implied by `-D warnings`

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unused import: `SecondPhase`

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unused import: `SecondPhase`

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unused import: `SecondPhase`

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unused import: `SecondPhase`

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unused import: `SecondPhase`
};

use super::is_zero::{IsZeroChip, IsZeroInstruction};
Expand Down Expand Up @@ -40,13 +40,13 @@ impl<F: Field> IsEqualChip<F> {
/// Configure the IsEqual chip.
pub fn configure(
meta: &mut ConstraintSystem<F>,
value_inv: impl FnOnce(&mut ConstraintSystem<F>) -> Column<Advice>,
q_enable: impl FnOnce(&mut VirtualCells<'_, F>) -> Expression<F>,
lhs: impl FnOnce(&mut VirtualCells<'_, F>) -> Expression<F>,
rhs: impl FnOnce(&mut VirtualCells<'_, F>) -> Expression<F>,
) -> IsEqualConfig<F> {
let value = |meta: &mut VirtualCells<F>| lhs(meta) - rhs(meta);
let value_inv = meta.advice_column_in(SecondPhase);

let value_inv = value_inv(meta);
let is_zero_config = IsZeroChip::configure(meta, q_enable, value, value_inv);
let is_equal_expression = is_zero_config.is_zero_expression.clone();

Expand Down Expand Up @@ -138,8 +138,13 @@ mod tests {
let lhs = |meta: &mut VirtualCells<F>| meta.query_advice(value, Rotation::cur());
let rhs = |_meta: &mut VirtualCells<F>| RHS.expr();

let is_equal =
IsEqualChip::configure(meta, |meta| meta.query_selector(q_enable), lhs, rhs);
let is_equal = IsEqualChip::configure(
meta,
|meta| meta.advice_column(),
|meta| meta.query_selector(q_enable),
lhs,
rhs,
);

let config = Self::Config {
q_enable,
Expand Down
1 change: 1 addition & 0 deletions zkevm-circuits/src/anchor_tx_circuit/sign_verify.rs
Original file line number Diff line number Diff line change
Expand Up @@ -172,6 +172,7 @@ impl<F: Field> SignVerifyConfig<F> {
let q_check = meta.complex_selector();
let is_equal_gx2 = IsEqualChip::configure(
meta,
|meta| meta.advice_column_in(SecondPhase),
|meta| meta.query_selector(q_check),
|meta| meta.query_advice(sig_rlc_acc, Rotation(63)), // SigR == GX2
|_| gx2_rlc.expr(),
Expand Down
2 changes: 1 addition & 1 deletion zkevm-circuits/src/table/byte_table.rs
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
use super::*;

/// Is byte table
/// byte table stores the value from 0 to 255 which is used to check whether the input is a byte
#[derive(Clone, Debug)]
pub struct ByteTable {
range256: Column<Fixed>,
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