Fix range after deleting RESET imode

deflate.py

@@ -15,7 +15,7 @@
 from myhdl import always, block, Signal, intbv, Error, ResetSignal, \
     enum, always_comb, concat, ConcatSignal, modbv, instances
 
-IDLE, WRITE, READ, STARTC, STARTD = range(6)
+IDLE, WRITE, READ, STARTC, STARTD = range(5)
 
 # Trade speed and functionality (DYNAMIC trees) for LUTs
 LOWLUT = True

deflate.v

@@ -1,6 +1,6 @@
 // File: deflate.v
 // Generated by MyHDL 0.10
-// Date: Mon Feb  4 17:28:53 2019
+// Date: Fri Feb  8 15:30:19 2019
 
 
 `timescale 1ns/10ps
@@ -1168,7 +1168,7 @@ always @(posedge clk) begin: DEFLATE_FILL_BUF
                 old_di <= 0;
             end
         end
-        else if (((i_mode == 4) || (i_mode == 5))) begin
+        else if (((i_mode == 3) || (i_mode == 4))) begin
             nb <= 0;
             if (1'b1) begin
                 old_di <= 0;
@@ -1274,7 +1274,7 @@ end
 
 always @(posedge clk) begin: DEFLATE_IO_LOGIC
     o_byte <= oram[(i_raddr & 511)];
-    if ((i_mode == 2)) begin
+    if ((i_mode == 1)) begin
         iram[(i_waddr & 511)] <= i_data;
         isize <= i_waddr;
     end
@@ -1337,7 +1337,7 @@ always @(posedge clk) begin: DEFLATE_LOGIC
     else begin
         case (state)
             5'b00000: begin
-                if ((1'b1 && (i_mode == 4))) begin
+                if ((1'b1 && (i_mode == 3))) begin
                     $write("STARTC");
                     $write("\n");
                     do_compress <= 1'b1;
@@ -1353,7 +1353,7 @@ always @(posedge clk) begin: DEFLATE_LOGIC
                     cur_cstatic <= 0;
                     state <= 5'b01110;
                 end
-                else if ((1'b1 && (i_mode == 5))) begin
+                else if ((1'b1 && (i_mode == 4))) begin
                     maxBits <= 9;
                     instantMaxBit <= 9;
                     prev_method <= 3;